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LukeVassallo/ACA24

Advanced Computer Architecture 2024 - Heidelberg University

Language: C - Size: 20.5 KB - Last synced: 3 days ago - Pushed: 3 days ago - Stars: 0 - Forks: 0

LukeVassallo/RL_PCB

RL_PCB is a novel learning-based method for optimising the placement of circuit components on a Printed Circuit Board (PCB).

Language: Python - Size: 15.9 MB - Last synced: 3 months ago - Pushed: 3 months ago - Stars: 5 - Forks: 1

LukeVassallo/picosoc-w-approximation

Picorv32-IM with exact and approximate SIMD multiplication extensions. The SIMD modules can be accessed with custom RISC-V Instruction to perform dual/quad 8-bit multiplications.

Language: Verilog - Size: 182 MB - Last synced: 4 months ago - Pushed: 4 months ago - Stars: 0 - Forks: 0

LukeVassallo/tt03-xor-cipher Fork of TinyTapeout/tt03-verilog-demo

Verilog demo for Tiny Tapeout 03

Language: Tcl - Size: 4.15 MB - Last synced: 12 months ago - Pushed: about 1 year ago - Stars: 4 - Forks: 1

LukeVassallo/vivado_scripted_build_example

A Xilinx Vivado project demonstrating a scripted build process

Language: Tcl - Size: 9.77 KB - Last synced: 12 months ago - Pushed: over 1 year ago - Stars: 0 - Forks: 0

LukeVassallo/tc_logger_apps

A collection of applications for the XLC thermocouple datalogger series.

Language: C - Size: 16.6 KB - Last synced: 12 months ago - Pushed: over 2 years ago - Stars: 0 - Forks: 0