mattvenn/librelane_summary

Language: Python - Size: 77.1 KB - Last synced at: 4 days ago - Pushed at: 4 days ago - Stars: 22 - Forks: 8

mattvenn/formal_timer

Project 3.1 Formal timer

Language: Verilog - Size: 8.79 KB - Last synced at: 7 days ago - Pushed at: 9 days ago - Stars: 3 - Forks: 5

mattvenn/flipflop_demo

Flip flop setup, hold & metastability explorer tool

Language: Jupyter Notebook - Size: 34.1 MB - Last synced at: 7 days ago - Pushed at: almost 3 years ago - Stars: 48 - Forks: 8

mattvenn/rgb_mixer_2025

Language: Python - Size: 25.4 KB - Last synced at: 10 days ago - Pushed at: 10 days ago - Stars: 0 - Forks: 0

mattvenn/frequency_counter_2025

Language: SMT - Size: 55.7 KB - Last synced at: 10 days ago - Pushed at: 10 days ago - Stars: 0 - Forks: 0

mattvenn/friispray

virtual graffiti

Language: Java - Size: 778 KB - Last synced at: 7 days ago - Pushed at: over 14 years ago - Stars: 9 - Forks: 4

mattvenn/magic-mosfet-2025

Language: Python - Size: 8.79 KB - Last synced at: 7 days ago - Pushed at: 17 days ago - Stars: 0 - Forks: 0

mattvenn/simulate-gate-2025

Language: Python - Size: 19.5 KB - Last synced at: 7 days ago - Pushed at: 18 days ago - Stars: 0 - Forks: 0

mattvenn/litho-light

An illuminated desk stand for a 150mm photolithography mask

Size: 3.3 MB - Last synced at: 7 days ago - Pushed at: about 1 year ago - Stars: 8 - Forks: 0

mattvenn/zero-to-asic-www

Language: HTML - Size: 181 MB - Last synced at: 7 days ago - Pushed at: 21 days ago - Stars: 9 - Forks: 9

mattvenn/spiraliser

converts images to svg spirals

Language: Python - Size: 179 KB - Last synced at: 7 days ago - Pushed at: over 7 years ago - Stars: 7 - Forks: 2

mattvenn/first-fpga-pcb

FPGA dev board based on Lattice iCE40 8k

Language: Verilog - Size: 6.96 MB - Last synced at: 7 days ago - Pushed at: about 5 years ago - Stars: 71 - Forks: 15

mattvenn/ttsky25a-riscv-compo-encoder

Language: Python - Size: 26.4 KB - Last synced at: 7 days ago - Pushed at: about 2 months ago - Stars: 1 - Forks: 0

mattvenn/teensy-audio-fx

Playable effects modeled on the Teenage Engineering Pocket operator series. Featuring Teensy 4 for audio processing.

Language: C++ - Size: 7.9 MB - Last synced at: 7 days ago - Pushed at: almost 4 years ago - Stars: 77 - Forks: 8

mattvenn/awesome-opensource-asic-resources

Size: 74.2 KB - Last synced at: 7 days ago - Pushed at: over 2 years ago - Stars: 339 - Forks: 45

mattvenn/basic-ecp5-pcb

Reference design for Lattice ECP5 FPGA. Featuring Raspberry Pi interface and 6 PMODs

Language: Verilog - Size: 8.87 MB - Last synced at: 7 days ago - Pushed at: about 4 years ago - Stars: 115 - Forks: 24

mattvenn/ttsky25a-tinyQV Fork of TinyTapeout/ttsky25a-tinyQV

TinyQV - A Risc-V SoC for Tiny Tapeout

Language: Python - Size: 101 MB - Last synced at: 7 days ago - Pushed at: about 1 month ago - Stars: 0 - Forks: 0

mattvenn/IIC-OSIC-TOOLS Fork of iic-jku/IIC-OSIC-TOOLS

IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.

Language: Shell - Size: 106 MB - Last synced at: 7 days ago - Pushed at: 3 months ago - Stars: 1 - Forks: 0

mattvenn/gate_level_simulation

Language: Verilog - Size: 131 KB - Last synced at: 7 days ago - Pushed at: over 4 years ago - Stars: 8 - Forks: 2

mattvenn/ttsky25a-riscv-compo-pwm

Language: Python - Size: 18.6 KB - Last synced at: 7 days ago - Pushed at: about 1 month ago - Stars: 0 - Forks: 0

mattvenn/pyfda-cocotb-demo

Audio filtering with pyfda and cocotb

Language: Verilog - Size: 668 KB - Last synced at: 7 days ago - Pushed at: almost 5 years ago - Stars: 12 - Forks: 1

mattvenn/librelane Fork of librelane/librelane

ASIC implementation flow infrastructure

Language: Python - Size: 31.5 MB - Last synced at: 7 days ago - Pushed at: about 2 months ago - Stars: 0 - Forks: 0

mattvenn/TinyTapeoutTest

Language: Verilog - Size: 16.6 KB - Last synced at: 7 days ago - Pushed at: about 2 months ago - Stars: 0 - Forks: 1

mattvenn/ttsky25a-frequency-counter

Language: Verilog - Size: 393 KB - Last synced at: 7 days ago - Pushed at: about 2 months ago - Stars: 0 - Forks: 0

mattvenn/ttsky25a-rgb-mixer

Language: Verilog - Size: 17.6 KB - Last synced at: 7 days ago - Pushed at: about 2 months ago - Stars: 0 - Forks: 0

mattvenn/tt08-analog-ring-osc

Language: Tcl - Size: 544 KB - Last synced at: 7 days ago - Pushed at: about 2 months ago - Stars: 6 - Forks: 1

mattvenn/project0_test

Project 0 CI

Size: 56.6 KB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 5 - Forks: 4

mattvenn/fpga-sram

mystorm sram test

Language: Verilog - Size: 526 KB - Last synced at: 7 days ago - Pushed at: almost 8 years ago - Stars: 28 - Forks: 3

mattvenn/vga-clock

Show the time on a VGA monitor. Submitted for the Google MPW1 ASIC shuttle.

Language: Verilog - Size: 1.48 MB - Last synced at: 7 days ago - Pushed at: almost 4 years ago - Stars: 62 - Forks: 12

mattvenn/fossi-foundation-web Fork of fossi-foundation/fossi-foundation-web

Language: Vue - Size: 42.6 MB - Last synced at: 7 days ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

mattvenn/cad

cad files for cnc machining

Language: Python - Size: 3.64 MB - Last synced at: 7 days ago - Pushed at: over 5 years ago - Stars: 69 - Forks: 31

mattvenn/Sky130-Z2A-Screensaver

Language: Verilog - Size: 45.9 KB - Last synced at: 7 days ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

mattvenn/icestorm Fork of YosysHQ/icestorm

Project IceStorm - Lattice iCE40 FPGAs Bitstream Documentation (Reverse Engineered)

Language: Python - Size: 5.28 MB - Last synced at: 7 days ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

mattvenn/z2a-course-regressions

Language: Makefile - Size: 3.91 KB - Last synced at: 7 days ago - Pushed at: 3 months ago - Stars: 1 - Forks: 0

mattvenn/gtkwave-python-filter-process

Language: Python - Size: 299 KB - Last synced at: 7 days ago - Pushed at: over 4 years ago - Stars: 34 - Forks: 2

mattvenn/frequency_counter

Project 2.2 Frequency counter

Language: Verilog - Size: 52.7 KB - Last synced at: 7 days ago - Pushed at: 3 months ago - Stars: 11 - Forks: 7

mattvenn/rgb_mixer

Project 2.1 RGB Colour Mixer

Language: Python - Size: 146 KB - Last synced at: 7 days ago - Pushed at: about 2 months ago - Stars: 4 - Forks: 14

mattvenn/caravel_mgmt_soc_litex Fork of chipfoundry/caravel_mgmt_soc_litex

Size: 4.59 GB - Last synced at: 7 days ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

mattvenn/wrapped_project_template

Template project for the Zero to ASIC course group ASIC application

Language: Verilog - Size: 85.4 MB - Last synced at: 7 days ago - Pushed at: over 2 years ago - Stars: 7 - Forks: 10

mattvenn/zero_to_asic_mpw4

Language: Verilog - Size: 321 MB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 15 - Forks: 1

mattvenn/animateVCD

animate an SVG with a VCD file

Language: Python - Size: 11.1 MB - Last synced at: 7 days ago - Pushed at: about 3 years ago - Stars: 13 - Forks: 2

mattvenn/tt-prism Fork of bleeptrack/tt-prism

Language: Verilog - Size: 29.3 KB - Last synced at: 7 days ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

mattvenn/multi_project_tools

tools to help make the most of the limited space we have on the Google sponsored Efabless shuttles

Language: Python - Size: 11 MB - Last synced at: 7 days ago - Pushed at: over 2 years ago - Stars: 36 - Forks: 14

mattvenn/ttihp-verilog-2025 Fork of arud4172/ttihp-verilog-2025

Language: Verilog - Size: 362 KB - Last synced at: 7 days ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

mattvenn/logLUTs

Tool to parse yosys and nextpnr logfiles to then plot LUT, flip-flop and maximum frequency stats as your project progresses.

Language: Python - Size: 213 KB - Last synced at: 7 days ago - Pushed at: almost 2 years ago - Stars: 21 - Forks: 3

mattvenn/ttihp0p3-z2a-logo-screensaver Fork of TinyTapeout/tt10-logo-screensaver

DVD style screen saver with the Tiny Tapeout logo and gamepad support

Language: Verilog - Size: 72.3 KB - Last synced at: 7 days ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

mattvenn/fpga-sdft

sliding DFT for FPGA, targetting Lattice ICE40 1k

Language: Verilog - Size: 183 KB - Last synced at: 7 days ago - Pushed at: over 5 years ago - Stars: 77 - Forks: 16

mattvenn/simulate-gate

Project 1.1 Simulate a Skywater 130nm standard cell using ngspice

Language: Makefile - Size: 72.3 KB - Last synced at: 7 days ago - Pushed at: about 2 months ago - Stars: 14 - Forks: 8

mattvenn/ttihp0p3-a1k0n-demoscene Fork of a1k0n/tt08-vgademo

tinytapeout testing

Language: Verilog - Size: 266 KB - Last synced at: 7 days ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

mattvenn/ttihp0p3-vga-clock

Matt's VGA clock for TT IHP 0.3 test chip

Language: Verilog - Size: 16.6 KB - Last synced at: 7 days ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

mattvenn/spasic_experiment_testing Fork of psychogenic/spasic_experiment_testing

A system to allow you to develop and test your spASIC experiments

Language: Python - Size: 42 KB - Last synced at: 7 days ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

mattvenn/dmx_lights

Language: Python - Size: 29.3 KB - Last synced at: 7 days ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

mattvenn/tt-multiplexer Fork of TinyTapeout/tt-multiplexer

Language: Verilog - Size: 4.53 MB - Last synced at: 7 days ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

mattvenn/ws2812-core

verilog core for ws2812 leds

Language: Verilog - Size: 725 KB - Last synced at: 7 days ago - Pushed at: almost 4 years ago - Stars: 33 - Forks: 3

mattvenn/analog_course_components

Language: Tcl - Size: 1.4 MB - Last synced at: 7 days ago - Pushed at: 4 months ago - Stars: 2 - Forks: 0

mattvenn/efabless_project_tool

Tool to fetch and parse data about Efabless MPW projects

Language: Python - Size: 1.3 MB - Last synced at: 7 days ago - Pushed at: over 2 years ago - Stars: 15 - Forks: 2

mattvenn/zero_to_asic_mpw6_bringup

clone this inside the Efabless caravel_board repo

Language: C - Size: 69.3 KB - Last synced at: 7 days ago - Pushed at: 4 months ago - Stars: 0 - Forks: 1

mattvenn/pi_pico_pio_pwm_frequency_measurement Fork of intel00000/pi_pico_pio_pwm_frequency_measurement

Measure PWM signal frequency using the Raspberry Pi Pico's PIO (Programmable Input/Output) in MicroPython without cpu involvement.

Language: Python - Size: 159 KB - Last synced at: 7 days ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0

mattvenn/wishbone_buttons_leds

simple wishbone client to read buttons and write leds

Language: Verilog - Size: 642 KB - Last synced at: 7 days ago - Pushed at: almost 2 years ago - Stars: 18 - Forks: 0

mattvenn/test_rejunity_ay8913 Fork of psychogenic/test_rejunity_ay8913

Test code for the tt_um_rejunity_ay8913 project

Language: Python - Size: 33.2 KB - Last synced at: 7 days ago - Pushed at: 5 months ago - Stars: 0 - Forks: 1

mattvenn/zero_to_asic_mpw3

Language: Verilog - Size: 180 MB - Last synced at: 7 days ago - Pushed at: almost 4 years ago - Stars: 4 - Forks: 0

mattvenn/caravel_user_project Fork of efabless/caravel_user_project

Zero to ASIC group submission for MPW2

Language: Verilog - Size: 259 MB - Last synced at: 7 days ago - Pushed at: 6 months ago - Stars: 13 - Forks: 3

mattvenn/tinytapeout-verilog-test Fork of omerk/tinytapeout-verilog-test

Language: Verilog - Size: 1.03 MB - Last synced at: 7 days ago - Pushed at: almost 3 years ago - Stars: 1 - Forks: 0

mattvenn/tt04-z2a-demo Fork of TinyTapeout/tt04-verilog-demo

Verilog Demo

Language: Verilog - Size: 30.3 KB - Last synced at: 7 days ago - Pushed at: about 2 years ago - Stars: 1 - Forks: 0

mattvenn/tt06-mattw-practice Fork of wongmatthew73/tt06-mattw-practice

Submission template for Tiny Tapeout 06 - Verilog HDL Projects

Size: 36.1 KB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

mattvenn/logo-to-gds2

Language: Python - Size: 224 KB - Last synced at: 7 days ago - Pushed at: over 2 years ago - Stars: 18 - Forks: 2

mattvenn/tt06-analog-r2r-dac

Language: Verilog - Size: 38.8 MB - Last synced at: 7 days ago - Pushed at: 7 months ago - Stars: 6 - Forks: 1

mattvenn/arduinosketchbook

all my arduino sketches

Language: Arduino - Size: 3.73 MB - Last synced at: 7 days ago - Pushed at: over 8 years ago - Stars: 11 - Forks: 15

mattvenn/wokwi-verilog-gds-test

Language: Verilog - Size: 2.88 MB - Last synced at: 7 days ago - Pushed at: almost 3 years ago - Stars: 55 - Forks: 20

mattvenn/tt06-analog-relax-osc

Language: Makefile - Size: 586 KB - Last synced at: 7 days ago - Pushed at: 6 months ago - Stars: 3 - Forks: 0

mattvenn/tt10-level-shifter

Language: Tcl - Size: 124 KB - Last synced at: 7 days ago - Pushed at: 6 months ago - Stars: 0 - Forks: 0

mattvenn/tt10-spi-test

Language: Python - Size: 29.3 KB - Last synced at: 7 days ago - Pushed at: 7 months ago - Stars: 1 - Forks: 1

mattvenn/adjustable-psu-digital-counter

Language: Verilog - Size: 224 KB - Last synced at: 7 days ago - Pushed at: 7 months ago - Stars: 0 - Forks: 0

mattvenn/counter-gds-spice-sim

Language: Tcl - Size: 55.7 KB - Last synced at: 7 days ago - Pushed at: 7 months ago - Stars: 0 - Forks: 0

mattvenn/tt08-analog-r2r-dac-3v3

Language: Verilog - Size: 3.57 MB - Last synced at: 7 days ago - Pushed at: 7 months ago - Stars: 4 - Forks: 1

mattvenn/caravel_board Fork of efabless/caravel_board

Language: C - Size: 102 MB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 0

mattvenn/tt06-analog-dac

Language: Tcl - Size: 20.5 KB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

mattvenn/tt06-fet-opamp Fork of dsatizabal/tt06-fet-opamp

Language: Makefile - Size: 60.5 MB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

mattvenn/tiny_tapeout Fork of vyshnavthonichal/tiny_tapeout

Tiny_tapeout of 2024

Language: Tcl - Size: 112 KB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 0

mattvenn/tt-fpga-demo

Language: Tcl - Size: 18.6 KB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 3 - Forks: 1

mattvenn/tt07-vga-clock

Language: Verilog - Size: 22.5 KB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 1

mattvenn/tt-vga-clock-firmware Fork of TinyTapeout/tt-micropython-firmware

TinyTapeout demo pcb's RP2040 functionality

Language: Python - Size: 631 KB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

mattvenn/tt07-mixer Fork of KolosKoblasz/tt07-mixer

Simple Gilbert cell mixer asic

Language: Verilog - Size: 579 KB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

mattvenn/tt07-mos-bandgap

Language: Tcl - Size: 421 KB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 5 - Forks: 0

mattvenn/analog-virtualbox-vm-sky130a Fork of TinyTapeout/analog-virtualbox-vm-sky130a

Virtual Machine for analog with the open source Sky130A PDK

Language: Shell - Size: 252 KB - Last synced at: 7 days ago - Pushed at: about 1 year ago - Stars: 2 - Forks: 0

mattvenn/tt08-ring-oscillator

Language: Tcl - Size: 7.31 MB - Last synced at: 7 days ago - Pushed at: about 1 year ago - Stars: 1 - Forks: 0

mattvenn/function_generator

Language: Verilog - Size: 14.6 KB - Last synced at: 7 days ago - Pushed at: 12 months ago - Stars: 2 - Forks: 1

mattvenn/tt06-inverter

Language: Tcl - Size: 260 KB - Last synced at: 7 days ago - Pushed at: 12 months ago - Stars: 1 - Forks: 3

mattvenn/tt09-analog-double-inverter

Language: Tcl - Size: 52.7 KB - Last synced at: 7 days ago - Pushed at: 11 months ago - Stars: 1 - Forks: 0

mattvenn/magic_challenge

Language: Tcl - Size: 185 KB - Last synced at: 3 days ago - Pushed at: 11 months ago - Stars: 3 - Forks: 1

mattvenn/tt07-twin-tee-opamp-osc

Language: Verilog - Size: 1.09 MB - Last synced at: 7 days ago - Pushed at: 9 months ago - Stars: 3 - Forks: 0

mattvenn/tinytapeout-07 Fork of TinyTapeout/tinytapeout-07

Tiny Tapeout 7

Language: Verilog - Size: 330 MB - Last synced at: 7 days ago - Pushed at: 9 months ago - Stars: 1 - Forks: 0

mattvenn/inverter-operating-point

example from Roel Jordans

Size: 6.84 KB - Last synced at: 7 days ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0

mattvenn/cocotb-refresh

Language: Makefile - Size: 1.95 KB - Last synced at: 7 days ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0

mattvenn/magic-mosfet

Project 1.2 Draw a MOSFET with Magic

Language: Makefile - Size: 22.5 KB - Last synced at: 7 days ago - Pushed at: 3 months ago - Stars: 2 - Forks: 6

mattvenn/spi_client

SPI client core in verilog, tested with raspberry pi SPI master

Language: Verilog - Size: 7.81 KB - Last synced at: 7 days ago - Pushed at: almost 7 years ago - Stars: 10 - Forks: 1

mattvenn/kicad

Language: Python - Size: 11.7 MB - Last synced at: 7 days ago - Pushed at: over 5 years ago - Stars: 14 - Forks: 5

mattvenn/klayout_properties

Language: Ruby - Size: 43.9 KB - Last synced at: 7 days ago - Pushed at: over 1 year ago - Stars: 9 - Forks: 0

mattvenn/python-workshop

Language: Python - Size: 2.34 MB - Last synced at: 7 days ago - Pushed at: over 9 years ago - Stars: 4 - Forks: 2

mattvenn/tt09-wokwi-inverter-demo

Language: Verilog - Size: 10.7 KB - Last synced at: 7 days ago - Pushed at: 10 months ago - Stars: 0 - Forks: 1