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GitHub / tcal-x 7 repositories
tcal-x/bazel_rules_hdl Fork of hdl/bazel_rules_hdl
Hardware Description Language (Verilog, VHDL, Chisel, nMigen, etc) with open tools (Yosys, Verilator, OpenROAD, etc) rules for Bazel (https://bazel.build)
Language: Starlark - Size: 872 KB - Last synced: about 2 months ago - Pushed: about 2 months ago - Stars: 0 - Forks: 0
tcal-x/CFU-Playground Fork of google/CFU-Playground
Language: Verilog - Size: 15.8 MB - Last synced: 2 months ago - Pushed: 2 months ago - Stars: 0 - Forks: 0
tcal-x/tcal-yosys-vivado
Examples using Yosys-Vivado flow
Language: Verilog - Size: 21.5 KB - Last synced: over 1 year ago - Pushed: over 1 year ago - Stars: 0 - Forks: 0
tcal-x/xls Fork of google/xls
XLS: Accelerated HW Synthesis
Size: 27.2 MB - Last synced: over 1 year ago - Pushed: over 1 year ago - Stars: 0 - Forks: 0
tcal-x/yosys-f4pga-plugins Fork of chipsalliance/yosys-f4pga-plugins
Plugins for Yosys developed as part of the F4PGA project.
Language: Verilog - Size: 1.84 MB - Last synced: over 1 year ago - Pushed: almost 2 years ago - Stars: 0 - Forks: 0
tcal-x/verilator-make-env-test
Demonstration of issue with Verilator package in the Conda environment.
Language: Makefile - Size: 3.91 KB - Last synced: over 1 year ago - Pushed: almost 2 years ago - Stars: 1 - Forks: 0
tcal-x/misc
Random stuff -- small demos/tutorials, etc.
Language: Python - Size: 21.5 KB - Last synced: over 1 year ago - Pushed: about 2 years ago - Stars: 1 - Forks: 2
tcal-x/CFU Fork of grayresearch/CFU
RISC-V FPGA SIG Custom Function Unit Specification
Language: Verilog - Size: 9.4 MB - Last synced: over 1 year ago - Pushed: about 2 years ago - Stars: 0 - Forks: 0
tcal-x/litex-boards Fork of alanvgreen/litex-boards
LiteX boards files
Language: Python - Size: 3.17 MB - Last synced: over 1 year ago - Pushed: over 1 year ago - Stars: 1 - Forks: 0
tcal-x/litex Fork of enjoy-digital/litex
Build your hardware, easily!
Language: C - Size: 14.5 MB - Last synced: over 1 year ago - Pushed: almost 2 years ago - Stars: 0 - Forks: 0
tcal-x/nextpnr Fork of YosysHQ/nextpnr
nextpnr portable FPGA place and route tool
Language: C++ - Size: 11 MB - Last synced: over 1 year ago - Pushed: over 1 year ago - Stars: 0 - Forks: 0
tcal-x/pythondata-cpu-vexriscv Fork of litex-hub/pythondata-cpu-vexriscv
Python module containing verilog files for vexriscv cpu (for use with LiteX).
Language: Verilog - Size: 4.08 MB - Last synced: over 1 year ago - Pushed: almost 2 years ago - Stars: 0 - Forks: 2
tcal-x/containers Fork of hdl/containers
Building and deploying container images for open source electronic design automation (EDA)
Size: 4.01 MB - Last synced: over 1 year ago - Pushed: almost 3 years ago - Stars: 0 - Forks: 0
tcal-x/litespi Fork of litex-hub/litespi
Small footprint and configurable SPI core
Language: Python - Size: 267 KB - Last synced: over 1 year ago - Pushed: over 2 years ago - Stars: 0 - Forks: 0
tcal-x/VexRiscv Fork of SpinalHDL/VexRiscv
A FPGA friendly 32 bit RISC-V CPU implementation
Language: Assembly - Size: 12 MB - Last synced: over 1 year ago - Pushed: about 3 years ago - Stars: 1 - Forks: 0
tcal-x/tcal-x.github.io
The blog of tcal-x
Language: SCSS - Size: 1.61 MB - Last synced: over 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0
tcal-x/symbiflow-examples Fork of chipsalliance/f4pga-examples
Examples designs for showing different ways to use SymbiFlow toolchains.
Language: Verilog - Size: 27.3 MB - Last synced: over 1 year ago - Pushed: over 3 years ago - Stars: 1 - Forks: 0
tcal-x/fomu-workshop Fork of im-tomu/fomu-workshop
Support files for participating in a Fomu workshop
Language: Verilog - Size: 18 MB - Last synced: over 1 year ago - Pushed: almost 2 years ago - Stars: 1 - Forks: 0
tcal-x/icebreaker-examples Fork of icebreaker-fpga/icebreaker-verilog-examples
This repository contains small example designs that can be used with the open source icestorm flow.
Size: 353 KB - Last synced: over 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0
tcal-x/icebreaker-nmigen-examples Fork of icebreaker-fpga/icebreaker-amaranth-examples
This repository contains icebreaker examples for nmigen, a refresh of migen.
Size: 21.5 KB - Last synced: over 1 year ago - Pushed: almost 4 years ago - Stars: 0 - Forks: 0
tcal-x/nmigen-tutorial Fork of RobertBaruch/nmigen-tutorial
A tutorial for using nmigen
Size: 186 KB - Last synced: over 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0
tcal-x/symbiflow-docs Fork of chipsalliance/f4pga
Documentation for SymbiFlow
Size: 387 KB - Last synced: over 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0
tcal-x/prjxray Fork of f4pga/prjxray
Documenting the Xilinx 7-series bit-stream format.
Language: Python - Size: 4.23 MB - Last synced: over 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0
tcal-x/foboot Fork of im-tomu/foboot
Bootloader for Fomu
Language: C - Size: 5.49 MB - Last synced: over 1 year ago - Pushed: over 3 years ago - Stars: 1 - Forks: 0
tcal-x/ecpprog Fork of gregdavill/ecpprog
Programmer for the Lattice ECP5 series, making use of FTDI based adaptors
Size: 60.5 KB - Last synced: over 1 year ago - Pushed: almost 4 years ago - Stars: 1 - Forks: 0
tcal-x/SpinalHDL Fork of SpinalHDL/SpinalHDL
Scala based HDL
Size: 15 MB - Last synced: over 1 year ago - Pushed: almost 4 years ago - Stars: 1 - Forks: 0
tcal-x/symbiflow-arch-defs Fork of f4pga/f4pga-arch-defs
FOSS architecture definitions of FPGA hardware useful for doing PnR device generation.
Language: Python - Size: 6.87 MB - Last synced: over 1 year ago - Pushed: over 3 years ago - Stars: 1 - Forks: 0
tcal-x/litex-buildenv Fork of timvideos/litex-buildenv
An environment for building LiteX based FPGA designs. Makes it easy to get everything you need!
Size: 8.48 MB - Last synced: over 1 year ago - Pushed: almost 4 years ago - Stars: 0 - Forks: 0
tcal-x/prjxray-db Fork of f4pga/prjxray-db
Project X-Ray Database: XC7 Series
Language: Shell - Size: 53.8 MB - Last synced: over 1 year ago - Pushed: about 4 years ago - Stars: 0 - Forks: 0
tcal-x/litex-vexriscv-tensorflow-lite-demo Fork of antmicro/litex-vexriscv-tensorflow-lite-demo
TF Lite demo on LiteX/VexRiscv soft RISC-V SoC on a Digilent Arty board
Language: C# - Size: 1.19 MB - Last synced: over 1 year ago - Pushed: about 4 years ago - Stars: 0 - Forks: 0
tcal-x/tcal-x
Placeholder
Size: 0 Bytes - Last synced: over 1 year ago - Pushed: about 4 years ago - Stars: 0 - Forks: 0