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GitHub / Multimedia-Processing / Verilog-FixedPoint

A Verilog fixed-point lib: custom bit width, arithmetic, converting to float, with single cycle & pipeline version. 一个Verilog定点数库，提供算术运算、与浮点数的互相转换，包含单周期和流水线两种实现。

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Fork of WangXuan95/Verilog-FixedPoint
Stars: 0
Forks: 0
Open Issues: 0

License: None
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Repo Size: 53.7 KB
Dependencies: 0

Created: over 1 year ago
Updated: over 1 year ago
Last pushed: about 2 years ago
Last synced: 9 months ago

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