GitHub / muhammadaldacher / Analog-Design-of-Bootstrapped-Switch
This project shows how to design a clock bootstrapped circuit to improve the nonlinearity of the switch used in Track & Hold circuit. A comparison is done between several topologies, showing the ENOB, SNR, & SFDR achieved in each case.
Stars: 6
Forks: 2
Open issues: 0
License: None
Language: MATLAB
Size: 12.6 MB
Dependencies parsed at: Pending
Created at: almost 6 years ago
Updated at: over 2 years ago
Pushed at: almost 6 years ago
Last synced at: about 2 years ago
Topics: adc, analog-design, bootstrapped, cmos