dadongshangu/async_FIFO

This asynchrounous FIFO deisgn and UVM verificaiton is one case study of me. The design is based on Cliff Cumming's paper and the UVM is coded by me(Xianghzi Meng)

Language: SystemVerilog - Size: 178 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 40 - Forks: 14