Topic: "circuit-model"
CMU-SAFARI/CLRDRAM
Circuit-level model for the Capacity-Latency Reconfigurable DRAM (CLR-DRAM) architecture. This repository contains the SPICE models of the CLR-DRAM architecture and the baseline architecture used in our ISCA 2020 paper "Luo et al., CLR-DRAM: A Low-Cost DRAM Architecture Enabling Dynamic Capacity-Latency Trade-Off": https://people.inf.ethz.ch/omutlu/pub/CLR-DRAM_capacity-latency-reconfigurable-DRAM_isca20.pdf
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Sha-Group/Modified-Diode-Model Fork of WPT-Lab124/Modified-Diode-Model
The Modified Diode Model for Perovskite Solar Cells
Language: MATLAB - Size: 3.88 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 4 - Forks: 1
WPT-Lab124/Modified-Diode-Model
The Modified Diode Model for Perovskite Photovoltaics
Language: MATLAB - Size: 3.89 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 3 - Forks: 2
EmilioSchi/Transistor-based-chaotic-oscillator
About the https://iris.unipa.it/retrieve/handle/10447/276402/535513/81-Minati_Chaos-2017.pdf I show a set of dynamic non linear equation that represent a good approximation of autonomous chaotic oscillator circuit. Chaos is a pervasive occurrence in these kind of circuits.
Language: MATLAB - Size: 14.4 MB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 2 - Forks: 0
