ultraembedded/riscv_soc

Basic RISC-V Test SoC

Language: Verilog - Size: 6.1 MB - Last synced at: about 4 hours ago - Pushed at: over 6 years ago - Stars: 138 - Forks: 30

ultraembedded/FPGAmp

720p FPGA Media Player (RISC-V + Motion JPEG + SD + HDMI on an Artix 7)

Language: C - Size: 12.5 MB - Last synced at: about 2 months ago - Pushed at: over 4 years ago - Stars: 279 - Forks: 44

ultraembedded/core_usb_host

Basic USB 1.1 Host Controller for small FPGAs

Language: C - Size: 53.7 KB - Last synced at: about 1 month ago - Pushed at: about 5 years ago - Stars: 90 - Forks: 18

ultraembedded/fpga_test_soc

A small test SoC for various soft-CPUs (Cortex-M0, RISC-V)

Language: C - Size: 1.11 MB - Last synced at: 30 days ago - Pushed at: over 5 years ago - Stars: 33 - Forks: 12

ultraembedded/core_usb_bridge

USB -> AXI Debug Bridge

Language: Verilog - Size: 22.5 KB - Last synced at: about 1 month ago - Pushed at: about 4 years ago - Stars: 39 - Forks: 11

ultraembedded/biriscv

32-bit Superscalar RISC-V CPU

Language: Verilog - Size: 2.98 MB - Last synced at: 2 months ago - Pushed at: almost 4 years ago - Stars: 1,021 - Forks: 171

ultraembedded/core_sdram_axi4

SDRAM controller with AXI4 interface

Language: C++ - Size: 43 KB - Last synced at: 3 months ago - Pushed at: almost 6 years ago - Stars: 92 - Forks: 31

ultraembedded/libhelix-mp3

Fixed-point MP3 decoder (RISC-V port)

Language: C - Size: 142 KB - Last synced at: 3 months ago - Pushed at: over 1 year ago - Stars: 91 - Forks: 30

ultraembedded/exactstep

Instruction set simulator for RISC-V, MIPS and ARM-v6m

Language: C++ - Size: 970 KB - Last synced at: 3 months ago - Pushed at: almost 4 years ago - Stars: 97 - Forks: 19

ultraembedded/core_dbg_bridge

UART -> AXI Bridge

Language: Verilog - Size: 21.5 KB - Last synced at: 18 days ago - Pushed at: about 4 years ago - Stars: 61 - Forks: 19

ultraembedded/riscv-sw-test

Language: C++ - Size: 508 KB - Last synced at: about 1 month ago - Pushed at: almost 5 years ago - Stars: 6 - Forks: 2

ultraembedded/core_ft60x_axi

FTDI FT600 SuperSpeed USB3.0 to AXI bus master

Language: C++ - Size: 4.29 MB - Last synced at: 3 months ago - Pushed at: about 5 years ago - Stars: 94 - Forks: 27

ultraembedded/riscv

RISC-V CPU Core (RV32IM)

Language: Verilog - Size: 5.27 MB - Last synced at: 4 months ago - Pushed at: almost 4 years ago - Stars: 1,398 - Forks: 251

ultraembedded/riscv_sbc

A RISC-V SBC based around the LambdaConcept USB2Sniffer FPGA board.

Language: Verilog - Size: 2.01 MB - Last synced at: 3 months ago - Pushed at: about 5 years ago - Stars: 29 - Forks: 4

ultraembedded/core_usb_sniffer

USB capture IP

Language: Verilog - Size: 23.4 KB - Last synced at: about 1 month ago - Pushed at: about 5 years ago - Stars: 21 - Forks: 8

ultraembedded/riscv-linux-boot

Trivial RISC-V Linux binary bootloader

Language: C - Size: 19.5 KB - Last synced at: 3 months ago - Pushed at: over 4 years ago - Stars: 50 - Forks: 10

ultraembedded/armv6m-sim

Simple instruction set simulator for ARMv6-M (Cortex M0)

Language: C++ - Size: 43.9 KB - Last synced at: 3 months ago - Pushed at: about 6 years ago - Stars: 16 - Forks: 4

ultraembedded/core_ddr3_controller

A DDR3 memory controller in Verilog for various FPGAs

Language: Verilog - Size: 232 KB - Last synced at: 5 months ago - Pushed at: almost 4 years ago - Stars: 418 - Forks: 94

ultraembedded/cores

Various HDL (Verilog) IP Cores

Language: Verilog - Size: 211 KB - Last synced at: 5 months ago - Pushed at: about 4 years ago - Stars: 745 - Forks: 218

ultraembedded/core_usb_cdc

Basic USB-CDC device core (Verilog)

Language: Verilog - Size: 38.1 KB - Last synced at: 5 months ago - Pushed at: about 4 years ago - Stars: 76 - Forks: 15

ultraembedded/core_usb_fs_phy

USB Full Speed PHY

Language: Verilog - Size: 17.6 KB - Last synced at: 5 months ago - Pushed at: about 5 years ago - Stars: 41 - Forks: 6

ultraembedded/fat_io_lib

Small footprint, low dependency, C code implementation of a FAT16 & FAT32 driver.

Language: C - Size: 60.5 KB - Last synced at: 3 months ago - Pushed at: over 6 years ago - Stars: 66 - Forks: 13

ultraembedded/core_jpeg_decoder

HW JPEG decoder wrapper with AXI-4 DMA

Language: Verilog - Size: 11.7 KB - Last synced at: about 2 months ago - Pushed at: almost 5 years ago - Stars: 34 - Forks: 6

ultraembedded/openlogicbit

Open-source Logic Analyzer gateware for various FPGA dev boards/replacement gateware for commercially available logic analyzers.

Language: Verilog - Size: 606 KB - Last synced at: 5 months ago - Pushed at: about 4 years ago - Stars: 133 - Forks: 18

ultraembedded/core_soc

Basic Peripheral SoC (SPI, GPIO, Timer, UART)

Language: Verilog - Size: 63.5 KB - Last synced at: 5 months ago - Pushed at: about 5 years ago - Stars: 62 - Forks: 11

ultraembedded/core_axi_cache

128KB AXI cache (32-bit in, 256-bit out)

Language: Verilog - Size: 18.6 KB - Last synced at: 5 months ago - Pushed at: about 4 years ago - Stars: 48 - Forks: 5

ultraembedded/core_enet

Ethernet MAC 10/100 Mbps

Language: Verilog - Size: 17.6 KB - Last synced at: 5 months ago - Pushed at: over 3 years ago - Stars: 25 - Forks: 5

ultraembedded/core_jpeg

High throughput JPEG decoder in Verilog for FPGA

Language: Verilog - Size: 171 KB - Last synced at: 5 months ago - Pushed at: over 3 years ago - Stars: 221 - Forks: 43

ultraembedded/embedded_httpd

Embedded HTTP Server

Language: C - Size: 32.2 KB - Last synced at: 5 months ago - Pushed at: over 8 years ago - Stars: 4 - Forks: 0

ultraembedded/core_spiflash

SPI-Flash XIP Interface (Verilog)

Language: Verilog - Size: 23.4 KB - Last synced at: 5 months ago - Pushed at: almost 4 years ago - Stars: 36 - Forks: 12

ultraembedded/core_ftdi_bridge

FTDI FT245 Style Synchronous/Asynchronous FIFO Bridge

Language: Verilog - Size: 19.5 KB - Last synced at: 2 days ago - Pushed at: about 4 years ago - Stars: 32 - Forks: 12

ultraembedded/core_dvi_framebuffer

Minimal DVI / HDMI Framebuffer

Language: Verilog - Size: 77.1 KB - Last synced at: 5 months ago - Pushed at: almost 5 years ago - Stars: 79 - Forks: 12

ultraembedded/librtos

Very basic real time operating system for embedded systems...

Language: C - Size: 41 KB - Last synced at: 3 months ago - Pushed at: almost 5 years ago - Stars: 16 - Forks: 4

ultraembedded/usb2sniffer

USB2Sniffer: High Speed USB 2.0 capture (for LambdaConcept USB2Sniffer hardware)

Language: Verilog - Size: 1.2 MB - Last synced at: 5 months ago - Pushed at: about 5 years ago - Stars: 55 - Forks: 11

ultraembedded/core_mmc

MMC (and derivative standards) host controller

Language: Verilog - Size: 16.6 KB - Last synced at: 5 months ago - Pushed at: almost 5 years ago - Stars: 23 - Forks: 3

ultraembedded/cortex_m0_wrapper

Cortex-M0 DesignStart Wrapper

Language: C++ - Size: 52.7 KB - Last synced at: 3 months ago - Pushed at: almost 6 years ago - Stars: 18 - Forks: 5

ultraembedded/riscv32_linux_from_scratch

RISC-V 32-bit Linux From Scratch

Language: Makefile - Size: 9.77 KB - Last synced at: about 1 month ago - Pushed at: about 5 years ago - Stars: 32 - Forks: 5

ultraembedded/core_ulpi_wrapper

ULPI Link Wrapper (USB Phy Interface)

Language: C++ - Size: 29.3 KB - Last synced at: 3 months ago - Pushed at: about 5 years ago - Stars: 25 - Forks: 10

ultraembedded/core_usb_uart

USB serial device (CDC-ACM)

Language: Verilog - Size: 26.4 KB - Last synced at: 5 months ago - Pushed at: about 5 years ago - Stars: 37 - Forks: 10

ultraembedded/core_audio

Audio controller (I2S, SPDIF, DAC)

Language: Verilog - Size: 33.2 KB - Last synced at: 5 months ago - Pushed at: almost 6 years ago - Stars: 82 - Forks: 19

ultraembedded/minispartan6-audio

miniSpartan6+ (Spartan6) FPGA based MP3 Player

Language: Verilog - Size: 595 KB - Last synced at: 5 months ago - Pushed at: almost 6 years ago - Stars: 27 - Forks: 8

ultraembedded/core_uriscv

Another tiny RISC-V implementation

Language: Verilog - Size: 65.4 KB - Last synced at: 5 months ago - Pushed at: about 4 years ago - Stars: 54 - Forks: 13

ultraembedded/altor32

AltOr32 - Alternative Lightweight OpenRisc CPU

Language: Verilog - Size: 313 KB - Last synced at: 5 months ago - Pushed at: over 9 years ago - Stars: 12 - Forks: 6

ultraembedded/core_ram_tester

AXI-4 RAM Tester Component

Language: Verilog - Size: 13.7 KB - Last synced at: 5 months ago - Pushed at: almost 5 years ago - Stars: 17 - Forks: 3

ultraembedded/xc6_bus_pirate

XC6 Bus Pirate (FPGA based multi-tool)

Language: Verilog - Size: 347 KB - Last synced at: 5 months ago - Pushed at: about 5 years ago - Stars: 9 - Forks: 1

ultraembedded/ecpix5-test

Test code / bitstreams for the LambdaConcept ECPIX-5 FPGA board

Language: Verilog - Size: 367 KB - Last synced at: 7 days ago - Pushed at: almost 5 years ago - Stars: 8 - Forks: 0

ultraembedded/rp2040_blinky

Simple blinky example for the RP2040 that does not require cmake

Language: C++ - Size: 16.6 KB - Last synced at: about 1 month ago - Pushed at: over 4 years ago - Stars: 4 - Forks: 0

ultraembedded/orangecrab

Test projects for the OrangeCrab ECP5 FPGA board

Language: Verilog - Size: 202 KB - Last synced at: 5 months ago - Pushed at: almost 5 years ago - Stars: 8 - Forks: 3

ultraembedded/ecpix-5

Projects for the ECPiX-5 - a ECP5 FPGA board.

Language: Verilog - Size: 473 KB - Last synced at: about 2 months ago - Pushed at: about 5 years ago - Stars: 14 - Forks: 3

ultraembedded/minispartan6

Projects for the Scarab Minispartan6+ FPGA board

Language: VHDL - Size: 133 KB - Last synced at: 5 months ago - Pushed at: about 10 years ago - Stars: 13 - Forks: 8

ultraembedded/usb_sniffer 📦

High Speed USB 2.0 capture device based on miniSpartan6+

Language: C - Size: 65.4 KB - Last synced at: about 1 year ago - Pushed at: about 5 years ago - Stars: 57 - Forks: 32

ultraembedded/riscv-linux Fork of riscvarchive/riscv-linux

RISC-V Linux Port (supporting RV32IM - CPUs without atomic extensions)

Language: C - Size: 1.48 GB - Last synced at: about 1 year ago - Pushed at: over 6 years ago - Stars: 4 - Forks: 4

ultraembedded/libsigrok Fork of sigrokproject/libsigrok

Read-only mirror of the official repo at git://sigrok.org/libsigrok. Pull requests welcome. Please file bugreports at sigrok.org/bugzilla.

Language: C - Size: 9.09 MB - Last synced at: about 1 year ago - Pushed at: over 2 years ago - Stars: 8 - Forks: 1

ultraembedded/riscv-cores-list Fork of riscvarchive/riscv-cores-list

RISC-V Cores, SoC platforms and SoCs

Size: 150 KB - Last synced at: about 1 year ago - Pushed at: over 5 years ago - Stars: 4 - Forks: 1

ultraembedded/legacy_jpeg_decoder Fork of nekomona/aq_axis_djpeg 📦

Language: Verilog - Size: 520 KB - Last synced at: about 1 year ago - Pushed at: almost 5 years ago - Stars: 8 - Forks: 2

ultraembedded/core_mpx

MPX is a open-source CPU which can execute code compiled for MIPS-I ISA

Language: Verilog - Size: 85.9 KB - Last synced at: 5 months ago - Pushed at: over 4 years ago - Stars: 9 - Forks: 1

ultraembedded/opensbi Fork of riscv-software-src/opensbi

RISC-V Open Source Supervisor Binary Interface

Size: 611 KB - Last synced at: about 1 year ago - Pushed at: over 5 years ago - Stars: 2 - Forks: 0

ultraembedded/openFPGALoader Fork of trabucayre/openFPGALoader

Universal utility for programming FPGA

Language: C++ - Size: 1.19 MB - Last synced at: about 1 year ago - Pushed at: about 4 years ago - Stars: 2 - Forks: 0

ultraembedded/riscv-linux-prebuilt

RISC-V Linux prebuilt images

Size: 11.1 MB - Last synced at: 5 months ago - Pushed at: over 5 years ago - Stars: 5 - Forks: 1

ultraembedded/riscv-gdb Fork of mythdraenor/riscv-gdb

RISC-V GDB port

Size: 37.3 MB - Last synced at: about 1 year ago - Pushed at: about 11 years ago - Stars: 1 - Forks: 0

ultraembedded/riscv-gcc Fork of riscvarchive/riscv-old-gcc

gcc+newlib and gcc+glibc toolchains

Language: C - Size: 163 MB - Last synced at: about 1 year ago - Pushed at: almost 11 years ago - Stars: 1 - Forks: 0

ultraembedded/riscv-glibc Fork of riscvarchive/riscv-glibc

RISC-V port of GNU's libc

Language: C - Size: 142 MB - Last synced at: about 1 year ago - Pushed at: over 6 years ago - Stars: 1 - Forks: 0

ultraembedded/busybox Fork of mirror/busybox

BusyBox mirror

Language: C - Size: 34.8 MB - Last synced at: about 1 year ago - Pushed at: over 6 years ago - Stars: 2 - Forks: 1

ultraembedded/riscv-compliance Fork of riscv-non-isa/riscv-arch-test

Language: C - Size: 59.2 MB - Last synced at: about 1 year ago - Pushed at: over 5 years ago - Stars: 1 - Forks: 0

ultraembedded/xchange Fork of brouhaha/xchange

Change part number or package in a Xilinx 7-series FPGA bitstream

Size: 27.3 KB - Last synced at: about 1 year ago - Pushed at: over 5 years ago - Stars: 1 - Forks: 0

ultraembedded/u-boot Fork of u-boot/u-boot

"Das U-Boot" Source Tree

Size: 179 MB - Last synced at: about 1 year ago - Pushed at: about 5 years ago - Stars: 1 - Forks: 0

ultraembedded/ps1-tests Fork of JaCzekanski/ps1-tests

Collection of PlayStation 1 tests for emulator development

Language: C++ - Size: 3.85 MB - Last synced at: about 1 year ago - Pushed at: over 4 years ago - Stars: 2 - Forks: 1

ultraembedded/or1k-gcc Fork of openrisc/or1k-gcc

Language: C - Size: 604 MB - Last synced at: about 1 year ago - Pushed at: about 11 years ago - Stars: 0 - Forks: 0

ultraembedded/or1k-src Fork of openrisc/or1k-src

OpenRISC 1000 port for sourceware.org's src tree (binutils, gdb, newlib, etc.)

Language: C - Size: 96.8 MB - Last synced at: about 1 year ago - Pushed at: about 11 years ago - Stars: 0 - Forks: 0

ultraembedded/.github

Size: 1000 Bytes - Last synced at: 5 months ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0

ultraembedded/uClibc-or1k Fork of openrisc/uClibc-or1k

uClibc for OpenRISC 1000

Language: C - Size: 16.8 MB - Last synced at: about 1 year ago - Pushed at: about 12 years ago - Stars: 0 - Forks: 2