GitHub / verilog-to-routing 7 Repositories
verilog-to-routing/vtr-verilog-to-routing
Verilog to Routing -- Open Source CAD Flow for FPGA Research
Language: C++ - Size: 320 MB - Last synced at: 4 days ago - Pushed at: 4 days ago - Stars: 1,106 - Forks: 415

verilog-to-routing/verilog-to-routing.github.io
Website for Verilog to Routing
Language: SCSS - Size: 70.6 MB - Last synced at: 13 days ago - Pushed at: 13 days ago - Stars: 6 - Forks: 3

verilog-to-routing/ezgl
Language: C++ - Size: 739 KB - Last synced at: 7 days ago - Pushed at: 8 days ago - Stars: 10 - Forks: 6

verilog-to-routing/libblifparse
Parsing library for BLIF netlists
Language: C++ - Size: 355 KB - Last synced at: 7 months ago - Pushed at: 7 months ago - Stars: 18 - Forks: 10

verilog-to-routing/tatum
Tatum: A Fast, Flexible Static Timing Analysis (STA) Engine for Digital Circuits
Language: C++ - Size: 2.09 MB - Last synced at: 7 months ago - Pushed at: about 1 year ago - Stars: 55 - Forks: 10

verilog-to-routing/vtr-buildbot
Buildbot Infrastructure for VTR
Language: HTML - Size: 1010 KB - Last synced at: almost 2 years ago - Pushed at: over 5 years ago - Stars: 4 - Forks: 3

verilog-to-routing/libsdcparse
Language: C++ - Size: 149 KB - Last synced at: almost 2 years ago - Pushed at: over 5 years ago - Stars: 9 - Forks: 6
