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GitHub / Emilylulu / Implementation-of-SDRAM-interface-with-a-parallel-bus-in-Verilog

JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Emilylulu%2FImplementation-of-SDRAM-interface-with-a-parallel-bus-in-Verilog

Stars: 2
Forks: 0
Open issues: 0

License: None
Language: Verilog
Size: 13.7 KB
Dependencies parsed at: Pending

Created at: over 6 years ago
Updated at: over 6 years ago
Pushed at: over 6 years ago
Last synced at: about 2 years ago

Topics: bus-interface, sdram, verilog

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