GitHub / codegauravb7 / verilog-toUpper

CSC 211000 Project 1 — Gate-level toUpper in Verilog with delays, tests, and report

JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/codegauravb7%2Fverilog-toUpper
PURL: pkg:github/codegauravb7/verilog-toUpper

Stars: 0
Forks: 0
Open issues: 0

License: None
Language: Verilog
Size: 7.31 MB
Dependencies parsed at: Pending

Created at: 4 days ago
Updated at: 3 days ago
Pushed at: 3 days ago
Last synced at: 3 days ago

Topics: ascii, gtkwave, verilog

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