GitHub / sanyamagarwal10 / Traffic-Light-Controller-Using-Verilog

Traffic Light Controller using Verilog HDL, designed with FSM for managing two-way or four-way intersections. Supports configurable light timings, pedestrian signals, and reset options. Includes a testbench for simulation and verification. Ideal for FPGA implementation and digital system design.

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Topics: pspice, traffic-light-controller, verilog

• Files
• Readme
• Dependencies