GitHub / ssayin / riscv32-sim
An easy-to-use, still-in-development RISC-V 32-bit instruction-accurate (IA) simulator.
JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ssayin%2Friscv32-sim
PURL: pkg:github/ssayin/riscv32-sim
Stars: 2
Forks: 1
Open issues: 0
License: mit
Language: C++
Size: 480 KB
Dependencies parsed at: Pending
Created at: almost 3 years ago
Updated at: 12 months ago
Pushed at: 12 months ago
Last synced at: 12 months ago
Topics: instruction-set-simulator, riscv, riscv-sim, riscv-simulator, riscv32