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GitHub / vlsi-nanocomputing / risc-v-lim-architecture

RISC-Vlim is a framework for Logic-in-Memory Architectures based on RI5CY from PULP-Platform

JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/vlsi-nanocomputing%2Frisc-v-lim-architecture

Stars: 3
Forks: 0
Open issues: 0

License: other
Language: Verilog
Size: 24.4 MB
Dependencies parsed at: Pending

Created at: about 3 years ago
Updated at: over 2 years ago
Pushed at: almost 2 years ago
Last synced at: almost 2 years ago

Topics: emerging-tech, logic-in-memory, memory-management, racetrack, risc-v, riscv, von-neumann-architecture

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