Package Usage: pypi: vunit-hdl
VUnit is an open source unit testing framework for VHDL/SystemVerilog.
87 versions
Latest release: about 2 years ago
12,594 downloads last month
View more package details: https://packages.ecosyste.ms/registries/pypi.org/packages/vunit-hdl
View more repository details: http://repos.ecosyste.ms/hosts/GitHub/repositories/VUnit%2Fvunit
Dependent Repos 19

jwprice100/vcst
VUnit and Cocotb Smashed TogetherSize: 85.9 KB - Last synced: about 2 years ago - Pushed: over 2 years ago


mindful-ai/ORACLE_PY_08082022
Python material for OracleSize: 4.66 MB - Last synced: about 2 years ago - Pushed: almost 3 years ago

core-get/core-get
Client for the core-get package sharing systemSize: 87.9 KB - Last synced: 27 days ago - Pushed: over 4 years ago


guilhermecarvalhoacc/Tecweb_django
Size: 11 MB - Last synced: about 2 years ago - Pushed: about 4 years ago

Gekkio/gb-research
Game Boy hardware researchSize: 12.8 MB - Last synced: about 1 year ago - Pushed: about 1 year ago

fchamicapereira/verilog-exercises
Size: 148 KB - Last synced: about 2 years ago - Pushed: almost 3 years ago

adame22/FPGA-sampling Fork of acoustic-warfare/FPGA-sampling
flash-buildSize: 10.5 MB - Last synced: about 2 years ago - Pushed: over 2 years ago

benreynwar/slvcodec
Generate conversions to/from VHDL types and std_logic_vector. Generate python-based tests.Size: 297 KB - Last synced: 5 days ago - Pushed: 3 months ago


IEEE-SA/vasg/Packages
Mirror of VHDL Packages, an open source project incorporated by the IEEE 1076 standard. This mirror utilizes the CI of gitlab.com.Last synced: over 2 years ago
Elpra/drever-framework/drever
Python implementation of the Drever framework.Last synced: over 2 years ago
JacobDrotz/FPGA-sampling Fork of adame22/FPGA-sampling
flash-buildSize: 18 MB - Last synced: almost 2 years ago - Pushed: almost 2 years ago





HenryRocha/computer-design-clock
Simple Clock for Insper's 2020.2 Computer Design class.Size: 891 KB - Last synced: about 2 years ago - Pushed: over 4 years ago

retar-kamuy/script-examples
Size: 244 KB - Last synced: about 2 years ago - Pushed: over 2 years ago

seadanda/hdlcc Fork of suoto/hdl_checker
HDL Code Checker back endSize: 449 KB - Last synced: about 1 year ago - Pushed: about 7 years ago

thasti/ipbb Fork of ipbus/ipbb
IPbus Builder ToolSize: 1.54 MB - Last synced: about 5 hours ago - Pushed: over 1 year ago

lgrativol/gb-research Fork of Gekkio/gb-research
Game Boy hardware researchSize: 12.9 MB - Last synced: over 1 year ago - Pushed: over 1 year ago

sean-galloway/RTLDesignSherpa
This site is hopefully a springboard for others to learn about coding in System Verilog and experimenting with FPGAs.Size: 27.7 MB - Last synced: 9 days ago - Pushed: 9 days ago


CoffeeTonight/SpaceStreet
First Rep.Size: 11.7 KB - Last synced: over 1 year ago - Pushed: over 1 year ago

IvarNilsson/FPGA_template_repo
This is a template repository that works well for my current workflow. It works for both VHDL, Verilog and SystemVerilogSize: 29.3 KB - Last synced: 9 months ago - Pushed: 9 months ago


darketik/darketik_dev_env
Scripts, home config and environnment install for ubuntuSize: 890 KB - Last synced: 17 days ago - Pushed: 17 days ago


sibeov/docker-script
Various DockerfilesSize: 6.84 KB - Last synced: 6 months ago - Pushed: 6 months ago

interfect/dcpu16-core
WIP DCPU-16 core implementation in VHDLSize: 24.4 KB - Last synced: 5 months ago - Pushed: 5 months ago

Quil180/nixos-config
This repository contains my personal modular NixOS configuration for seamless system setup and management. It includes installation scripts, user-specific settings, system-wide configurations, package definitions, and additional resources like wallpapers. Features include automated installation and support for Vivado/Xilinx.Size: 109 MB - Last synced: 13 days ago - Pushed: 13 days ago
