GitHub / GauravJain28 / Digital-Clock

Design of a digital clock in VHDL. Course Assignment of COL215: Digital Logic and Systems Design taught in First Sem, 2020-21 at IIT Delhi

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License: mit
Language: VHDL
Size: 3.43 MB
Dependencies parsed at: Pending

Created at: over 4 years ago
Updated at: about 4 years ago
Pushed at: over 4 years ago
Last synced at: about 2 years ago

Topics: digital-logic, fpga, systems-design, vhdl

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