GitHub / Mightlaus / CLA-full-adder

A high-performance and versatile carry-lookahead (CLA) full adder designed for rapid addition of arbitrary x^y bit inputs.

JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/Mightlaus%2FCLA-full-adder
PURL: pkg:github/Mightlaus/CLA-full-adder

Stars: 1
Forks: 0
Open issues: 0

License: gpl-3.0
Language: Verilog
Size: 18.6 KB
Dependencies parsed at: Pending

Created at: over 1 year ago
Updated at: 5 months ago
Pushed at: over 1 year ago
Last synced at: 3 months ago

Topics: adder, digital-circuits, high-performance, verilog

Loading...