GitHub / Soham-coder / ROCC_based_neurosynapse
ROCC accelerator ISA based neuroSynapse
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Stars: 1
Forks: 1
Open issues: 0
License: None
Language: SystemVerilog
Size: 1.67 MB
Dependencies parsed at: Pending
Created at: about 4 years ago
Updated at: almost 3 years ago
Pushed at: over 3 years ago
Last synced at: over 2 years ago
Topics: fsm, random, rocc, rocketchip-rocc, state-machine, systemverilog, testing, verilog-hdl
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