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GitHub / hoangsonww / Digital-Design-Labs

🖥️ A collection of SystemVerilog modules and Assembly programs. This repo includes examples of decoders, encoders, binary adders, and interactive games such as Guessing Game implemented in hardware description and assembly languages, illustrating practical applications in digital systems and microprocessor interfacing.

JSON API: https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/hoangsonww%2FDigital-Design-Labs

Stars: 10
Forks: 6
Open Issues: 0

License: mit
Language: Assembly
Repo Size: 720 KB
Dependencies: 0

Created: 2 months ago
Updated: 6 days ago
Last pushed: 6 days ago
Last synced: 6 days ago

Topics: 3to8decoder, alu, arithmetic-logic-unit, assembly, carry-look-ahead-adder, carry-select-adder, counter, decoder, encoder, finite-state-machine, guessing-game, microcontroller, microcontroller-programming, pic16f84a, system-design, systemverilog, verilog

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