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GitHub topics: flotaing-point-arithmetic

manish-kj/Posit-HDL-Arithmetic

Universal number Posit HDL Arithmetic Architecture generator

Language: Verilog - Size: 1.03 MB - Last synced at: over 2 years ago - Pushed at: almost 6 years ago - Stars: 42 - Forks: 11

manish-kj/PACoGen

PACoGen: Posit Arithmetic Core Generator

Language: Verilog - Size: 29.4 MB - Last synced at: over 2 years ago - Pushed at: almost 6 years ago - Stars: 47 - Forks: 12

Related Keywords
flotaing-point-arithmetic 2 fp-posit-converter 2 posit 2 posit-adder 2 posit-arithmetic 2 posit-arithmetic-generator 2 posit-fp-converter 2 posit-multiplier 1 poposit-multiplier 1 posit-divider 1 posit-hdl-generator 1 unum 1