legup | Topic | Ecosyste.ms: Repos

Topic: "legup"

Language: C - Size: 67.4 KB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 9 - Forks: 1

SForum 2020 : "A Run-time Hardware Routing Implementation for CGRA Overlays" code and data.

Language: Verilog - Size: 9.5 MB - Last synced at: almost 2 years ago - Pushed at: almost 5 years ago - Stars: 9 - Forks: 1

Autotuning High-Level Synthesis for FPGAs, published @ ReConFig '17

Language: PostScript - Size: 27.4 MB - Last synced at: about 1 month ago - Pushed at: about 4 years ago - Stars: 7 - Forks: 1

This repository contains CHStone benchmark codes which have been annotated and tuned by Orio tool to test the speed up of execution.

Language: Verilog - Size: 111 MB - Last synced at: about 2 years ago - Pushed at: almost 8 years ago - Stars: 3 - Forks: 0

Auto-Tuning chain to optimize software execution and compilation time upon heterogeneous systems

Size: 550 MB - Last synced at: over 1 year ago - Pushed at: about 8 years ago - Stars: 2 - Forks: 0

Automated adaptive clock management tool for LegUp HLS-generated circuits on FPGA.

Language: Python - Size: 69.3 KB - Last synced at: over 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 1

Signature Based Fault Tolerance

Language: C - Size: 783 KB - Last synced at: over 1 year ago - Pushed at: almost 7 years ago - Stars: 1 - Forks: 1