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GitHub / KarimZakzouk / AES
Design and Development of AES Encryption and Decryption Modules in Verilog HDL for AES128, AES192, and AES256 Algorithms.
JSON API: https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/KarimZakzouk%2FAES
Stars: 0
Forks: 0
Open Issues: 0
License: None
Language: Verilog
Repo Size: 24.4 KB
Dependencies: pending
Created: 17 days ago
Updated: 17 days ago
Last pushed: 17 days ago
Last synced: 17 days ago
Topics: advanced-encryption-standard, aes-128, aes-192, aes-256, aes-decryption, aes-encryption, algorithm-implementation, cryptography, data-encryption, data-security, fpga, fpga-development, hardware-design, security, verilog-hdl