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GitHub / LijinWilson / CMOS-NAND-gate-2-input-NAND-gate

This repository contains the design, simulation, and performance evaluation of a CMOS NAND Gate using Cadence Virtuoso. The project highlights the design principles and operational characteristics of a fundamental digital logic gate implemented with CMOS technology.

JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/LijinWilson%2FCMOS-NAND-gate-2-input-NAND-gate

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Created at: 4 months ago
Updated at: 4 months ago
Pushed at: 4 months ago
Last synced at: 4 months ago

Topics: cadence, cadence-virtuoso, cmos-circuits, cmos-logic, cmos-vlsi, layout, low-power-vlsi-design, nmos, pmos, vlsi-circuits, vlsi-design

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