GitHub / LijinWilson / CMOS-NAND-gate-2-input-NAND-gate
This repository contains the design, simulation, and performance evaluation of a CMOS NAND Gate using Cadence Virtuoso. The project highlights the design principles and operational characteristics of a fundamental digital logic gate implemented with CMOS technology.
Stars: 1
Forks: 0
Open issues: 0
License: None
Language:
Size: 0 Bytes
Dependencies parsed at: Pending
Created at: 4 months ago
Updated at: 4 months ago
Pushed at: 4 months ago
Last synced at: 4 months ago
Topics: cadence, cadence-virtuoso, cmos-circuits, cmos-logic, cmos-vlsi, layout, low-power-vlsi-design, nmos, pmos, vlsi-circuits, vlsi-design