GitHub topics: cmos-logic
Yellowflash-070/4bitRCA180nm
Performance Analysis of a 4-bit Ripple Carry Adder (RCA) formed using Static CMOS, Transmission Gate, NMOS Pass Transistor Logic at gpdk 180nm Technology node.
Size: 4.81 MB - Last synced at: 22 days ago - Pushed at: 22 days ago - Stars: 1 - Forks: 0
S2Sofficial/CMOS_Layout_Designing
CMOS Layout Designing
Size: 33.2 KB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0
LijinWilson/CMOS-NAND-gate-2-input-NAND-gate
This repository contains the design, simulation, and performance evaluation of a CMOS NAND Gate using Cadence Virtuoso. The project highlights the design principles and operational characteristics of a fundamental digital logic gate implemented with CMOS technology.
Size: 0 Bytes - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 1 - Forks: 0
shrujan0274/4bit7segment
180nm CMOS Design And Implementation of a Seven Segment Display Controller Using a 4-bit Binary Input (The repository with same name is created long ago and a new repository with the same name is created later and the contents in the repository is updated)
Size: 4.9 MB - Last synced at: 5 months ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0
Yellowflash-070/4bit-RCA-180nm-Layout
Layout of 4bit Ripple Carry Adder formed using CMOS logic in gpdk180nm technology node done in Cadence Virtuoso with no DRC and LVS errors.
Size: 20.5 KB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 1 - Forks: 0