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GitHub / WangXuan95 / FPGA-CAN
An FPGA-based lightweight CAN bus controller. 基于FPGA的轻量级CAN总线控制器。
JSON API: https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/WangXuan95%2FFPGA-CAN
Stars: 152
Forks: 51
Open Issues: 1
License: gpl-3.0
Language: Verilog
Repo Size: 416 KB
Dependencies:
0
Created: about 3 years ago
Updated: 3 months ago
Last pushed: 9 months ago
Last synced: 3 months ago
Topics: can, can-bus, control-area-network, controller, fpga, rtl, systemverilog, verilog
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