GitHub / arjun-mec / Digital-Combination-Lock

Verilog Implementation of a Digital Combinational Lock which unlocks when a specific 3 bit sequence is entered.

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PURL: pkg:github/arjun-mec/Digital-Combination-Lock

Stars: 0
Forks: 0
Open issues: 0

License: None
Language: Verilog
Size: 134 KB
Dependencies parsed at: Pending

Created at: 10 months ago
Updated at: 9 months ago
Pushed at: 9 months ago
Last synced at: 9 months ago

Topics: combinational-lock, d-flip-flop, gtkwave, icarus-verilog, sequential-logic, shift-register, verilog

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