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GitHub / cpantel / prog_fpgas

The nexys4ddr (vivado) port of https://github.com/simonmonk/prog_fpgas (ISE)

JSON API: https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/cpantel%2Fprog_fpgas

Stars: 1
Forks: 1
Open Issues: 0

License: mit
Language: Verilog
Repo Size: 98.6 KB
Dependencies: pending

Created: almost 5 years ago
Updated: 20 days ago
Last pushed: over 4 years ago
Last synced: 20 days ago

Topics: fpga, nexys4-ddr, verilog, vivado, wip

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