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GitHub / nawalmunif / Image-Processing-on-FPGA
An efficient FPGA-based design and implementation of image processing algorithm is presented using verilog hardware description language on Xilinx Vivado.
JSON API: https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/nawalmunif%2FImage-Processing-on-FPGA
Stars: 1
Forks: 0
Open Issues: 0
License: None
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Repo Size: 36.5 MB
Dependencies:
0
Created: over 3 years ago
Updated: 11 months ago
Last pushed: over 3 years ago
Last synced: 11 months ago
Topics: box-blur, edge-detection, fpga, grayscale-images, highpass-filter, image-processing, kernel-module, lowpass-filter, sobel-filter, unsharp-masking, verilog-hdl, vivado
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