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GitHub / rpm2003rpm / vagen
Generates verilogA testbench (stimulus and waveforms) for verification of analog IPs (VLSI design)
JSON API: https://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/rpm2003rpm%2Fvagen
Stars: 1
Forks: 0
Open Issues: 0
License: mit
Language: Python
Repo Size: 1.58 MB
Dependencies: pending
Created: over 1 year ago
Updated: about 2 months ago
Last pushed: about 2 months ago
Last synced: 19 days ago
Topics: cadence, cadence-virtuoso, generator, simulation, testbench, testbench-generator, verilog-a, verilog-ams, veriloga, waveform, waveform-generator