GitHub / yfzcsc / fpga_final_project
An NPU by chisel 3.4.3.
JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/yfzcsc%2Ffpga_final_project
Stars: 4
Forks: 0
Open issues: 0
License: None
Language: Scala
Size: 759 KB
Dependencies parsed at: Pending
Created at: over 3 years ago
Updated at: 11 months ago
Pushed at: over 3 years ago
Last synced at: 11 months ago
Topics: chisel, fpga, rtl, scala, verilog
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