FPGA | Topic | Ecosyste.ms: Repos

Topic: "FPGA"

spade-lang/spade

A better hardware description language.

Last synced at: 2 days ago - Stars: 76 - Forks: 26

x653/nand2tetris-fpga

This project is about building Hack on real hardware as proposed in chapter 13 of the course nand2tetris using only FOSS, free and open source hard- and software.

Last synced at: about 2 years ago - Stars: 31 - Forks: 8

rodrigomelo9/pyfpga

A Python package to use FPGA development tools programmatically. It is a mirror of https://github.com/PyFPGA/pyfpga, where the development is done. Documentation: https://pyfpga.github.io/pyfpga

Last synced at: over 2 years ago - Stars: 10 - Forks: 1

rodrigomelo9/core-comblock

A simple COMmunication BLOCK with well know interfaces in the FPGA side

Last synced at: over 2 years ago - Stars: 8 - Forks: 3

x653/mix-fpga

Implementation of MIX as proposed in "The Art of Computer Programming, Vol. 1" by Donald E. Knuth. Runs on iCE40-fpga using only FOSS Hard- and Software.

Last synced at: over 2 years ago - Stars: 8 - Forks: 1

lauterbach/jswitch

Lauterbach's JSwitch VHDL IP

Last synced at: 2 months ago - Stars: 5 - Forks: 0

mathewkhall/hpipe

Last synced at: almost 2 years ago - Stars: 5 - Forks: 2

x653/nand2tetris-13

This project is about building Hack on real hardware as proposed in Chapter 13 of the course nand2tetris using only FOSS, free and open source hard- and software.

Last synced at: over 2 years ago - Stars: 5 - Forks: 1

x653/xv6-riscv-fpga

Build a RISC-V computer system on fpga iCE40HX8K-EVB and run UNIX xv6 using only FOSS (free and open source hard- and software).

Last synced at: about 2 years ago - Stars: 5 - Forks: 0

rodrigomelo9/fpgargentina

Relevamiento de grupos de desarrollo, capacidades y casos de uso de la tecnología FPGA en Argentina. https://rodrigomelo9.gitlab.io/fpgargentina/

Last synced at: over 2 years ago - Stars: 4 - Forks: 2

tymonx/docker-modelsim

A Docker image with the ModelSim HDL simulator

Last synced at: over 2 years ago - Stars: 4 - Forks: 3

mupuf/litedip

Plug-and-play LiteX-based IP blocks enabling the creation of generic Linux drivers. Design your FPGA-based SoC with them and get a (potentially upstream-able) driver for it instantly!

Last synced at: about 2 years ago - Stars: 2 - Forks: 0

busshark/thirdparty/libxsvf

a fork of http://svn.clifford.at/libxsvf/trunk@104

Last synced at: over 2 years ago - Stars: 1 - Forks: 1

cv4497/ie707560_dvvsd_p2021

Repositorio Personal DVVSD P2021

Last synced at: over 2 years ago - Stars: 1 - Forks: 0

cv4497/ie707560_ie705694_dvvsd_p2021

Repositorio grupal DVVSD P2021

Last synced at: over 2 years ago - Stars: 1 - Forks: 0

lauterbach/jswitch-doc

LaTeX documentation of [JSwitch IP](https://gitlab.com/lauterbach/jswitch)

Last synced at: 2 months ago - Stars: 1 - Forks: 0

leastrobino/acoustic-levitation

Acoustic levitation on SoC FPGA (DE0-Nano-SoC) https://youtu.be/p1Vm4cL4aUA

Last synced at: over 2 years ago - Stars: 1 - Forks: 2

maCesc/snake

Final project for the MSc course of Laboratory of Advanced Electronics held in 2021 by Prof. Leonardo Ricci at the University of Trento.

Last synced at: over 2 years ago - Stars: 1 - Forks: 0

OK2NMZ/thesis-fso

Implementation of a freespace optics bridge.

Last synced at: over 2 years ago - Stars: 1 - Forks: 0

suoglu/pmod

Collection of simple interfaces for Digilent Pmods

Last synced at: about 2 years ago - Stars: 1 - Forks: 0

suoglu/spi

Set of simple modules to communicate via SPI protocol.

Last synced at: about 2 years ago - Stars: 1 - Forks: 0

tymonx/pytcl

**PyTCL** allows control **EDA** tools directly from **Python** that use **TCL**.

Last synced at: 29 days ago - Stars: 1 - Forks: 0

tymonx/pytest-cocotb

Last synced at: 22 days ago - Stars: 1 - Forks: 0

tymonx/xlogic-toolchain

Toolchain for simulating and building FPGA projects.

Last synced at: 11 months ago - Stars: 1 - Forks: 0

I'm currently working on a hobby project that I will call "vISA", which stands for "Variable Instruction Set Architecture." Because GitLab's Project Description is very limited, just read the README.md instead.

Last synced at: over 2 years ago - Stars: 1 - Forks: 0

xlogic/mono

The mono repository for the xlogic standalone library, services and command line tools.

Last synced at: 17 days ago - Stars: 1 - Forks: 0

xlogic/systemd/flexlm

Using containerized FlexLM license managers as systemd service units for serving FPGA/ASIC EDA software licenses that can be also used in CI/CD flow.

Last synced at: over 1 year ago - Stars: 1 - Forks: 0

xlogic/tool/questa

Containerized Questa*-Intel® FPGA Edition Software.

Last synced at: over 1 year ago - Stars: 1 - Forks: 0

aadhuniklabs/casp

CASP is developed to assist students, engineers and makers in designing, developing and validating real time embedded system software quickly with little programming effort.

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

acj0003/zynq_coresight

An Demonstration of FPGA Assisted Software Tracing for ARM CoreSight On Xilinx Zynq-7000 SoC

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

baioc/s4pu

A stack-based 16-bit CPU written in VHDL (with pt-br docs)

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

bm28/FPGA_ADC_DS

Tango device server written in C++ Company: Signal Processing Devices Sweden, The ADQ series digitizers (FPGAs) are portable high performance digitizers with analogue inputs, on-board DDR2/DDR3 memory and USB2, USB3, MTCA, PCIe, PXIe interfaces

Last synced at: 10 months ago - Stars: 0 - Forks: 0

BMHT/textile-wearables/textile-electronics/sensor-readout-board

Impedance analyzer board for versatile, high-speed, and distributed sensor measurement.

Last synced at: 9 months ago - Stars: 0 - Forks: 0

brettops/containers/verible

[Verible](https://github.com/chipsalliance/verible) build container.

Last synced at: about 2 years ago - Stars: 0 - Forks: 0

busshark/artyprogrammer

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

cmn263/fgdb

A basic FPGA debugging support called fgdb which is based on LegUp’s idea (an HLS-oriented debugging environment that allows to inspect circuitry generated by HLS the same way as GDB does).

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

damjan_prerad/videobox_fpga_dump_bucket

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

eliotr/RSA_Security_Token

Our bachelor's thesis. A Security token system for Linux PAM using an FPGA. Either utilizing 72-bit or 512-bit RSA cryptography when using Version A and B respectively. Version B is utilizing USB UART communication, while version A is air-gapped.

Last synced at: 2 months ago - Stars: 0 - Forks: 0

gdolle/orangecrab-case

Case for the OrangeCrab FPGA

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

jcorrecher/fifo

A VHDL synthesizable and behavioral FIFO design.

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

joe_helmick/arty01

Newest version of microprocessor design for Artix-7 100 Digilent Arty board. Includes the migrated Python assembler code as well, and a assembly-language implementation of Conway's Game of Life coded for this design.

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

Lazlo/icestorm-toolchain

Automate building the tools from Project IceStorm

Last synced at: over 2 years ago - Stars: 0 - Forks: 1

leo-plese/digital-logic/digital-logic-circuits-in-vhdl-hardware-description-language-testing-on-fpga-ulx2s-development-board

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

leo-plese/digital-logic/digital-logic-combinational-circuits-and-registers-in-vhdl-hardware-description-language-testing-on-fpga-ulx2s-development-board

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

leo-plese/digital-logic/digital-logic-sequential-circuits-1-in-vhdl-hardware-description-language-testing-on-fpga-ulx2s-development-board

Last synced at: over 2 years ago - Stars: 0 - Forks: 0

leo-plese/digital-logic/digital-logic-sequential-circuits-2-in-vhdl-hardware-description-language-testing-on-fpga-ulx2s-development-board

Last synced at: over 2 years ago - Stars: 0 - Forks: 0