GitHub / MohamedHussein27 / RISC-V-Single-Cycle-Implementation

This repository features a self-designed and enhanced single-cycle RISC-V processor, developed based on the Digital Design and Computer Architecture RISC-V Edition book. The project includes a complete Verilog implementation, supporting various instruction types, with performance enhancements and detailed schematics for analysis.

JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/MohamedHussein27%2FRISC-V-Single-Cycle-Implementation
PURL: pkg:github/MohamedHussein27/RISC-V-Single-Cycle-Implementation

Topics: computer-architecture, digital-design, quartus-prime, rtl-design, verilog-project, vivado

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