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GitHub / abdelazeem201 / Systolic-array-implementation-in-RTL-for-TPU

IC implementation of Systolic Array for TPU

JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/abdelazeem201%2FSystolic-array-implementation-in-RTL-for-TPU

Stars: 221
Forks: 27
Open issues: 0

License: mit
Language: Verilog
Size: 17 MB
Dependencies parsed at: Pending

Created at: over 4 years ago
Updated at: 14 days ago
Pushed at: 6 months ago
Last synced at: 13 days ago

Topics: asic, asic-design, asic-verification, fpga, rtl, verilog

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