GitHub / ben-marshall / uart

A simple implementation of a UART modem in Verilog.

JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/ben-marshall%2Fuart
PURL: pkg:github/ben-marshall/uart

Stars: 123
Forks: 22
Open issues: 3

License: mit
Language: Verilog
Size: 53.7 KB
Dependencies parsed at: Pending

Created at: over 8 years ago
Updated at: 5 months ago
Pushed at: over 3 years ago
Last synced at: 4 months ago

Topics: fpga, hardware, uart, uart-verilog, verilog, verilog-hdl

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