GitHub / nobotro / my-created-fpga-verilog-samples
my created fpga verilog samples.
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PURL: pkg:github/nobotro/my-created-fpga-verilog-samples
Stars: 0
Forks: 0
Open issues: 0
License: None
Language: Verilog
Size: 4.33 MB
Dependencies parsed at: Pending
Created at: over 6 years ago
Updated at: over 1 year ago
Pushed at: about 4 years ago
Last synced at: over 1 year ago
Topics: altera-fpga, fpga, verilog, verilog-programs, verilog-samples
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