GitHub / styczynski / fpga-verilog
Collection of my projects that was made as a part of Warsaw University FPGA course
JSON API: http://repos.ecosyste.ms/api/v1/hosts/GitHub/repositories/styczynski%2Ffpga-verilog
PURL: pkg:github/styczynski/fpga-verilog
Stars: 6
Forks: 0
Open issues: 0
License: mit
Language: Verilog
Size: 441 KB
Dependencies parsed at: Pending
Created at: over 6 years ago
Updated at: over 1 year ago
Pushed at: over 6 years ago
Last synced at: about 1 month ago
Topics: fpga, fpga-board, fpga-programming, hardware, uart, verilog, vga
Funding Links https://github.com/sponsors/styczynski
Loading...