cheyao/icepi-zero

ECP5 Development Board in the Raspberry Pi Zero form

Language: HTML - Size: 33.8 MB - Last synced at: about 13 hours ago - Pushed at: about 19 hours ago - Stars: 616 - Forks: 21

gnogni/ocm-pld-dev

Official firmware in development for MSX++ computers and compatibles.

Language: VHDL - Size: 14.3 MB - Last synced at: 5 days ago - Pushed at: 5 days ago - Stars: 64 - Forks: 12

FPGA-Research/FABulous_board

A PCB created for FABulous FPGAs, based on the caravel board.

Language: Python - Size: 13.6 MB - Last synced at: 12 days ago - Pushed at: 13 days ago - Stars: 5 - Forks: 1

Awais-Asghar/FPGA-Based-Smart-Car-Security-System

A Smart Anti-Theft Car Security System implemented on FPGA to detect and prevent unauthorized access. The system uses real-time monitoring and control logic to enhance vehicle safety and response.

Language: Verilog - Size: 17.5 MB - Last synced at: 13 days ago - Pushed at: 13 days ago - Stars: 0 - Forks: 0

GeorgesCoding/Traffic-Lights

Traffic light system for a four way intersection simulated using a Moore state machine and displayed on a FPGA

Language: VHDL - Size: 4.94 MB - Last synced at: 22 days ago - Pushed at: 23 days ago - Stars: 1 - Forks: 0

Choaib-ELMADI/riscv-on-de2-soc-fpga

A simplified RISC-V processor implemented in Verilog and deployed on the DE-2 SoC FPGA board.

Language: Verilog - Size: 24.4 MB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 5 - Forks: 2

FPGAwars/Alhambra-II-FPGA

:star2: Alhambra II FPGA board

Size: 28.6 MB - Last synced at: 6 days ago - Pushed at: 9 months ago - Stars: 91 - Forks: 26

HANANDA1/FPGA-Based-Smart-Car-Security-System

FPGA-Based Smart Car Security System is a robust solution for protecting high-end vehicles like Porsche. It uses Verilog and SystemVerilog to detect unauthorized access and disable the fuel pump, ensuring your car remains secure. 🛠️🚗

Language: Verilog - Size: 9.27 MB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 0 - Forks: 0

lcgroff2/Research-Backup

Backup of grad school data, dissertation, postdoc LabVIEW software, etc.

Language: PostScript - Size: 439 MB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 0 - Forks: 0

ti-uni-bielefeld/logisim-evolution-basys3

A set of scripts, manuals and patches to make synthesizing and downloading circuits from Logisim Evolution onto the Basys3 FPGA board on Linux easier and more seamless.

Language: Shell - Size: 533 KB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 7 - Forks: 1

BerkeleyLab/Marble

Dual FMC FPGA carrier board developed for general purpose use in particle accelerator electronics instrumentation.

Language: Python - Size: 237 MB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 27 - Forks: 8

Subbu-kata/SSIT

This project implements a smart, contactless water dispensing system using FPGA technology. Designed for hygiene-critical environments, the system uses infrared (IR) proximity sensors to detect hand presence and activates a centrifigual pump for flow of water accordingly—eliminating the need for physical contact.

Language: Verilog - Size: 15.6 KB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 0 - Forks: 0

dannyvanderpol/nexys_a7_projects

Projects for the Nexys A7 FPGA development board

Language: Tcl - Size: 4.01 MB - Last synced at: 2 months ago - Pushed at: 2 months ago - Stars: 0 - Forks: 0

emansarahafi/TrafficLightsController

A traffic lights controller implemented with VHDL.

Language: VHDL - Size: 5.3 MB - Last synced at: 2 days ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

Choaib-ELMADI/getting-started-with-vhdl

Getting started with VHDL: Very High Speed Integrated Circuit Hardware Description Language.

Language: VHDL - Size: 38.5 MB - Last synced at: about 2 months ago - Pushed at: 5 months ago - Stars: 7 - Forks: 0

Choaib-ELMADI/working-with-fpga-and-mips

A collection of practical sessions exploring FPGA programming and MIPS-based systems using the ALTERA Cyclone V DE-1 SoC board.

Language: Verilog - Size: 11.2 MB - Last synced at: about 2 months ago - Pushed at: 4 months ago - Stars: 5 - Forks: 0

bbttko/bbttko.github.io

btko site

Language: HTML - Size: 497 KB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

HarmandeepArneja/ReflexRush

Reaction Time Testing Game

Language: Verilog - Size: 0 Bytes - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

Choaib-ELMADI/working-with-fpga-and-vhdl

A collection of practical FPGA and VHDL projects using the ALTERA Cyclone V DE-1 SoC board.

Language: VHDL - Size: 12.4 MB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 4 - Forks: 0

regymm/SqueakyBoard

My self-designed ZYNQ-7010 4-layer developement board.

Language: TeX - Size: 26.7 MB - Last synced at: 7 days ago - Pushed at: about 4 years ago - Stars: 31 - Forks: 6

ojasvi-shah/VSDSquadron-FM-Research-Internship-by-Ojasvi-Shah

VSDSquadron FPGA Mini Board Research Internship by Ojasvi Shah

Language: Verilog - Size: 208 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 2 - Forks: 2

AmirhoseinMasoumi/SP7

Spartan-7 FPGA development board.

Size: 7.82 MB - Last synced at: about 2 months ago - Pushed at: over 3 years ago - Stars: 6 - Forks: 2

li3tuo4/rc-fpga-zcu

Port fpga-zynq (rocket-chip) to Xilinx ZYNQ Ultrascale+ board (ZCU102)

Language: Tcl - Size: 79.9 MB - Last synced at: 3 months ago - Pushed at: over 2 years ago - Stars: 61 - Forks: 17

TahirZia-1/UART

A complete UART (Universal Asynchronous Receiver/Transmitter) implementation for FPGAs, written in Verilog HDL. This project includes transmitter and receiver modules, baud rate generation, and test infrastructure for both simulation and hardware validation.

Language: SystemVerilog - Size: 231 KB - Last synced at: 14 days ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0

soham9284/Smart-Home-Automation-System

The Smart Home Automation System is a comprehensive solution that integrates sensors, manual controls, and automated logic to manage lighting, temperature, security, and emergency responses efficiently.

Language: Verilog - Size: 401 KB - Last synced at: 4 months ago - Pushed at: 6 months ago - Stars: 1 - Forks: 0

tvlad1234/violet

Virtual I/O for FPGAs

Language: Verilog - Size: 58.6 KB - Last synced at: 4 months ago - Pushed at: 5 months ago - Stars: 2 - Forks: 0

ahp-electronics/fpga-template

Lattice FPGA Verilog project template

Language: TeX - Size: 115 KB - Last synced at: 5 months ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0

michaelehab/AES-Verilog

Advanced encryption standard (AES128, AES192, AES256) Encryption and Decryption Implementation in Verilog HDL

Language: Verilog - Size: 8.73 MB - Last synced at: 5 months ago - Pushed at: almost 3 years ago - Stars: 90 - Forks: 21

duartegalvao/ArduZynq-Tutorials

Simple tutorials for getting started with programming on Trenz ArduZynq boards.

Size: 1.3 MB - Last synced at: 5 months ago - Pushed at: almost 6 years ago - Stars: 7 - Forks: 1

Slatyo/SonarTracking

Small project to track things with a waterproof sonar sensor

Language: C++ - Size: 2.22 MB - Last synced at: 4 months ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 0

Bubi2001/DaedaLogic

FPGA dev board based off AMD Xilinx Artix 7 XC7A35T-1FTG256C with lots of peripherals

Size: 3.91 KB - Last synced at: 6 months ago - Pushed at: 6 months ago - Stars: 0 - Forks: 0

sbaldzenka/TangNano4k_examples

Examples for Gowin Tang Nano 4k FPGA-board.

Language: C - Size: 1.13 MB - Last synced at: 5 months ago - Pushed at: almost 3 years ago - Stars: 9 - Forks: 4

mikeroyal/FPGA-Guide

FPGA Guide

Language: Verilog - Size: 25.4 KB - Last synced at: 4 months ago - Pushed at: over 3 years ago - Stars: 12 - Forks: 2

bp0609/Mini-Processor-Verilog-FPGA-Implemented

This repo contains a mini-processor design implemented on FPGA using verilog

Language: Verilog - Size: 1.28 MB - Last synced at: about 2 months ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

bp0609/Digital-Electronics-Verilog-ES204

This repo contains Verilog Assignments of the course ES-204 Digital Systems held in II-Semester 2024 at IIT Gandhinagar - Prof. Joycee Mekie

Language: Verilog - Size: 6 MB - Last synced at: 8 days ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

Choaib-ELMADI/fpga-programming-for-beginners

A collection of notes, summaries, and projects based on the book "FPGA Programming for Beginners" by Frank Bruno.

Language: Tcl - Size: 30.4 MB - Last synced at: 4 months ago - Pushed at: 11 months ago - Stars: 11 - Forks: 1

MONO-1223/AURAK-CENG336-ComputerArchitectureLab

This course focuses on modern computer system architecture and design principles, with an emphasis on using a Hardware Description Language (HDL) to create fundamental components of a microprocessor’s data path and control unit.

Size: 461 MB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0

arasgungore/256-colors-with-VGA

A VHDL-based VGA driver to display 256 different colors on a monitor.

Language: VHDL - Size: 492 KB - Last synced at: 4 months ago - Pushed at: almost 3 years ago - Stars: 14 - Forks: 0

cyber-murmel/chubby-hat

a PCB that turns the Colorlight 5A-75B into an easy to use development FPGA platform for cheap

Language: HTML - Size: 56.5 MB - Last synced at: 3 months ago - Pushed at: over 2 years ago - Stars: 18 - Forks: 2

paolopedroso/Stop-It-Game

Created a state machine for a sequential circuit game called "Stop It," which is programmed onto a Basys 3 FPGA Board. The project emphasizes understanding state machines, sequential circuits, and FPGA.

Language: SystemVerilog - Size: 316 KB - Last synced at: 12 months ago - Pushed at: 12 months ago - Stars: 0 - Forks: 0

migrassi/Visera

Placa de extensión de entradas y salidas digitales para prácticas de tecnología FPGA con la iCE40HX-8K Breakout Board de Lattice

Size: 2.62 MB - Last synced at: 12 months ago - Pushed at: almost 4 years ago - Stars: 1 - Forks: 0

paolopedroso/Screensaver

This project focuses on implementing a VGA interface and a screensaver for the Basys 3 FPGA Board. It involves generating VGA signals to display images stored in ROM, showcasing how to control and synchronize video output. The project culminates in programming the FPGA to display a functional screensaver on a VGA monitor.

Language: Tcl - Size: 2.72 MB - Last synced at: 12 months ago - Pushed at: 12 months ago - Stars: 0 - Forks: 0

peplxx/Morse-Coder

This project was made for optional fpga project during F23 Computer Architecture course. This is Quartus Project for turning fpga board into morse coder.

Language: HTML - Size: 10 MB - Last synced at: 4 months ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

MuntahaShams/Digital-clock-using-FPGA

digital clock is to display the time digitally using 7-segment display on FPGA Board. The digital clock by default displays the run time and time can be set by using time set assigned to switch on board.The digital clock designed is a 24-clock hour format. It displays the time in format of hours:minutes: seconds.

Size: 521 KB - Last synced at: 5 months ago - Pushed at: over 5 years ago - Stars: 1 - Forks: 0

choyiny/FPGANoTatsujin

Taiko no Tatsujin inspired game built with Verilog

Language: Verilog - Size: 148 KB - Last synced at: 4 months ago - Pushed at: almost 6 years ago - Stars: 7 - Forks: 2

ARMCoderBR/BenEatersSAP1

A FPGA implementation of Ben Eater's SAP-1 computer using the Digilent's BASYS 3 board.

Language: Verilog - Size: 852 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

cztee/Lattice_iCEStick_SelfStudy_Notes

Language: VHDL - Size: 4.44 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

tseiman/timer-netsend-test

A FPGA test suite to demonstrate time accuracy of realtime timer scheduled UDP sender especially in virtualized environment

Language: HTML - Size: 612 KB - Last synced at: about 1 year ago - Pushed at: about 8 years ago - Stars: 0 - Forks: 0

otaviocmaciel/DAC-MCP482x-VHDL-core

MCP482x DAC Family VHDL Core

Language: VHDL - Size: 5.68 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

SemKirkels/cmod_a7_breakout

A simple breakout board for the Digilent CMOD A7

Language: Tcl - Size: 14.6 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

styczynski/fpga-verilog

Collection of my projects that was made as a part of Warsaw University FPGA course

Language: Verilog - Size: 441 KB - Last synced at: about 2 months ago - Pushed at: over 6 years ago - Stars: 6 - Forks: 0

alialaei1/HDLab-FPGA-Development-Board

Open source FPGA development platform

Language: VHDL - Size: 21.6 MB - Last synced at: over 1 year ago - Pushed at: almost 2 years ago - Stars: 46 - Forks: 22

PingoLeon/ING2S1-FPGA 📦

Repo des fichiers du projet FPGA

Language: VHDL - Size: 10 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

Hello-FPGA/ZYNQ7020_Core_Board

This is xc7z020clg400 FPGA hardware core board design

Size: 17.3 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 5 - Forks: 4

ing0331/FPGA

Language: VHDL - Size: 78.3 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

AtlasFPGA/PARES_DIFERENCIALES_CYC1000

Fotografías y datos sobre los pares diferenciales escogidos para la creación de la placa ATLAS.

Size: 14 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

AtlasFPGA/MULTICORE-ESdUDO-ROJO

Diseñar la placa - ¡Créalo tu mismo! De coste más reducido para la Fpga CYC1000, con una BLUEPILL STM32F103C8T6

Size: 22.4 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

aybaras/VGA-based-screensaver

A VHDL-based VGA driver to implement a square 41x41 screensaver that cycles through 256 different colors.

Language: VHDL - Size: 494 KB - Last synced at: over 1 year ago - Pushed at: almost 3 years ago - Stars: 6 - Forks: 2

pergola-fpga/pergola

Low-cost ECP5 FPGA development board

Language: Python - Size: 15.5 MB - Last synced at: over 1 year ago - Pushed at: almost 5 years ago - Stars: 73 - Forks: 6

Lien182/ReconROS

Easy to use framework for ROS2 FPGA-based hardware acceleration; Supports Pub/Sub communication, Actions and Services and costum ROS Messages

Language: Tcl - Size: 49.2 MB - Last synced at: about 1 year ago - Pushed at: almost 2 years ago - Stars: 21 - Forks: 5

sumitarohit/Array_Multiplier_project

This is a 4*4 Array_Multiplier_project using Verilog HDL. This is successfully implemented on FPGA board.

Language: Tcl - Size: 179 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0

Jideco/PongGameGroup22

This is a Pong Game created by Group 22 for EEE308 project, Electronics and Electrical Department, Obafemi Awolowo University.

Language: VHDL - Size: 5.52 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0

janilaunonen/iCEblink40-examples

Simple example programs for the Lattice iCEblink40-HX1K Evaluation Kit in Verilog for fun and learning.

Language: Verilog - Size: 23.4 KB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 2 - Forks: 0

z4chh/FPGA_Slot_Machine

A slot machine created in System Verilog. It was built, simulated, synthesized, and implemented in Vivado, for use on the Xilinx Basys 3 board.

Language: SystemVerilog - Size: 12.7 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0

AtlasFPGA/ATLAS_SHIELD_STM32_MULTICORE-MKRbus

Multicore STM32, derivado en bluepill del multicore de Victor Trucco, en su Multicore II.

Size: 2.99 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

roryt12/qmtech_wukong_debian_on_litex_rocket

Running RISCV64 Debian on Litex/Rocket with a qmtech wukong FPGA

Size: 8.72 MB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

CasparCheng/Frogger-Game

This is a FPGA digital game using verilog to develop the frogger game

Size: 20.4 MB - Last synced at: 25 days ago - Pushed at: over 6 years ago - Stars: 2 - Forks: 0

aekanman/FPGA-video-decoder

:space_invader: Design and implementation of a video decoder on an Altera Cyclone V FPGA board.

Language: Verilog - Size: 387 MB - Last synced at: over 2 years ago - Pushed at: over 7 years ago - Stars: 14 - Forks: 4

nhasbun/de10nano_fpga_linux_config

DE10-Nano FPGA Configuration from Linux. Software to configure the FPGA portion of the Cyclone V SoC.

Language: C - Size: 8.79 KB - Last synced at: over 2 years ago - Pushed at: about 6 years ago - Stars: 21 - Forks: 6

tongplw/Undertale-Verilog

👻 Simple Undertale-like game on Basys3 FPGA written in Verilog

Language: Verilog - Size: 120 MB - Last synced at: over 2 years ago - Pushed at: about 5 years ago - Stars: 12 - Forks: 1

swapnilbembde/aes_128

VHDL Implementation of AES-128

Language: VHDL - Size: 43 KB - Last synced at: over 2 years ago - Pushed at: about 7 years ago - Stars: 2 - Forks: 5

arasgungore/VGA-based-screensaver Fork of aybaras/VGA-based-screensaver

A VHDL-based VGA driver to implement a square 41x41 screensaver that cycles through 256 different colors.

Language: VHDL - Size: 494 KB - Last synced at: over 2 years ago - Pushed at: almost 3 years ago - Stars: 12 - Forks: 0

DJosueMM/GrayDecoder

Desarrollo de un circuito decodificador de Gray por medio del HDL SystemVerilog

Language: SystemVerilog - Size: 500 KB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 2 - Forks: 1

roryt12/qmtech_wukong_debian_on_litex_naxriscv

Running RISCV64 Debian on Litex/NaxRiscv with a qmtech wukong FPGA

Size: 18.5 MB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 3 - Forks: 0

jubin-park/mini_tetris 📦

mini tetris game

Language: C - Size: 6.22 MB - Last synced at: 6 days ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

kromych/iceFUNprog2

Program the iceFUN board under Linux, MacOS, and Windows

Language: C++ - Size: 236 KB - Last synced at: 1 day ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0

sungchul09/calculator-android

fpga 보드, jni-android를 이용한 미니 프로젝트

Language: Makefile - Size: 27 MB - Last synced at: over 2 years ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0

felgueres/fpga

Programming an FPGA with Verilog

Language: Verilog - Size: 43.9 KB - Last synced at: over 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0

Phzera/Zynq-Bajie-board Fork of ChinaQMTECH/ZYNQ_BAJIE_BOARD

Zynq MP SoC in a Zynq XCZ7010 development board

Size: 253 MB - Last synced at: over 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0

Xenador77/UPduino-v3.x Fork of tinyvision-ai-inc/UPduino-v3.0

UPduino 3.x: new 4 layer layout, various other improvements

Language: HTML - Size: 32.7 MB - Last synced at: about 1 year ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0

Davide-DD/mastermind

FPGA implementation of the popular logic game using VHDL and Altera DE1

Language: VHDL - Size: 7.64 MB - Last synced at: over 2 years ago - Pushed at: over 7 years ago - Stars: 7 - Forks: 1

talhatallat/Advanced-Digital-Electronics

Size: 3.42 MB - Last synced at: about 1 month ago - Pushed at: about 3 years ago - Stars: 0 - Forks: 0

richardbenstead/ebaz4205

Projects using ebaz4205 Zynq board

Language: HTML - Size: 495 KB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 1 - Forks: 0

jkiv/icepool-board

KiCad designs for the icepool project.

Size: 18.2 MB - Last synced at: over 2 years ago - Pushed at: about 3 years ago - Stars: 4 - Forks: 2

siliconwitchery/s1-popout-board

Breakout development board for the S1 Module

Size: 8.16 MB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 5 - Forks: 0

talhatallat/Electronics

Size: 19.3 MB - Last synced at: about 1 month ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 1

Dirakon/FPGA-Controlling-PC

FPGA project: board connects to PC via cable, the user sends instructions (e.g. mouse move, mouse set, write a number, write a letter, etc) via FPGA interface.

Language: Verilog - Size: 111 KB - Last synced at: over 2 years ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0

DuinOS/AprendaFPGA

Algumas anotações de quem está aprendendo a sintetizar seu próprio microcontrolador em FPGA.

Size: 23.4 KB - Last synced at: 6 days ago - Pushed at: about 4 years ago - Stars: 2 - Forks: 0

Liberxue/awesome-FPGA

FPGA

Size: 3.91 KB - Last synced at: 13 days ago - Pushed at: about 4 years ago - Stars: 0 - Forks: 0

ddfulaa/Alhambra-ii

Proyectos en Verilog usando la tarjeta Alhambra-ii

Language: AGS Script - Size: 111 KB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 0

micro-FPGA/litex-boards Fork of litex-hub/litex-boards

LiteX boards files

Language: Python - Size: 9.75 MB - Last synced at: over 2 years ago - Pushed at: about 4 years ago - Stars: 4 - Forks: 2

Necrosys/Lattice-OR3T55-FPGA-Breakout-Board

A FPGA development board

Size: 3.28 MB - Last synced at: over 2 years ago - Pushed at: over 5 years ago - Stars: 1 - Forks: 0

Daniel-Pinheiro/Processador6Instr-FPGA

Trabalho para disciplina Projeto de Circuitos Integrados Digitais. Processador de 6 instruções 8 bits em System Verilog implementado em placa FPGA.

Language: SystemVerilog - Size: 900 KB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0

Daniel-Pinheiro/JogoDaVelha-FPGA

Trabalho para disciplina Sistemas Digitais 2. Jogo da Velha em VHDL p/ FPGA com matriz de leds e chaves 3x3

Language: VHDL - Size: 10.5 MB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0

HenryRocha/soc-embedded-linux

Individual repo for Insper's 2020.2 SoC and Embedded Linux class.

Language: C - Size: 29 MB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0

micro-FPGA/MEGA65-Hacks

Hacks and non standard things with MEGA65 Computer

Size: 39.1 KB - Last synced at: over 2 years ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0

omarsamyb/Calculator-Game

A simple Calculator game with multi levels written in Verilog & runs on a FPGA board.

Language: VHDL - Size: 6.41 MB - Last synced at: over 2 years ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0

Ty-Won/ECSE-324-Computer-Organization

:electric_plug: Source code for programming on an FPGA using C and Assembly :computer:

Language: Assembly - Size: 1.06 MB - Last synced at: over 2 years ago - Pushed at: over 6 years ago - Stars: 0 - Forks: 1

aekanman/FAT-player

:sound:Audio player from an SD card on C env

Language: Makefile - Size: 358 KB - Last synced at: over 2 years ago - Pushed at: over 7 years ago - Stars: 0 - Forks: 0

mmaguero/MII-SC16-17

[SC-MII-UGR-2016-17] Proyectos de la asignatura "Sistemas Críticos" del Máster Universitario en Ingeniería Informática del curso 2016-17 de la UGR

Language: C - Size: 44.6 MB - Last synced at: over 2 years ago - Pushed at: about 8 years ago - Stars: 0 - Forks: 0