0xMax42/pydepp

PyDEPP is a Python library that provides a high-level, object-oriented interface for interacting with Digilent FPGA boards over the DEPP (Digilent Asynchronous Parallel Port) protocol. It leverages the Digilent Adept SDK to enable seamless communication with DEPP-compatible devices.

Language: Python - Size: 12.7 KB - Last synced at: 18 days ago - Pushed at: 18 days ago - Stars: 0 - Forks: 0

konosubakonoakua/FPGA_MCU_Debugger_Collections

各种LInk大合集

Language: C - Size: 212 MB - Last synced at: 20 days ago - Pushed at: about 2 months ago - Stars: 704 - Forks: 299

frolovilya/stm32-signal-generator

STM32F4 analog signal generator with precise UART control

Language: C++ - Size: 1.4 MB - Last synced at: 28 days ago - Pushed at: 28 days ago - Stars: 1 - Forks: 0

lvgl/lv_port_xilinx_zedboard_vitis

This repository contains a template AMP project for the Zedboard using VGA, FreeRTOS, LVGL and USB peripherals

Language: C - Size: 82 MB - Last synced at: about 1 month ago - Pushed at: over 1 year ago - Stars: 22 - Forks: 5

mariusgreuel/dwfpy

Digilent WaveForms for Python

Language: Python - Size: 347 KB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 22 - Forks: 6

charkster/spi_slave_verilog

SPI bus slave and flip-flop register memory map implemented in Verilog 2001 for FPGAs

Language: Verilog - Size: 30.3 KB - Last synced at: 2 months ago - Pushed at: over 5 years ago - Stars: 15 - Forks: 11

pConst/xilinx_max_power

Stress test power subsystem of your Xilinx FPGA board

Language: SystemVerilog - Size: 86.9 KB - Last synced at: 2 months ago - Pushed at: about 7 years ago - Stars: 4 - Forks: 1

Digilent/WaveForms-SDK-Getting-Started-PY

Demo package for the WaveForms SDK Getting Started guide and multiple test scripts for different instruments.

Language: Python - Size: 133 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 43 - Forks: 13

c-sooyoung/swimAD2

중급물리실험 2를 수강하면서 Analog Discovery 2를 조작하기 위해 만들었던 간단한 함수들을 모아놓았다.

Language: Jupyter Notebook - Size: 81.1 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 3 - Forks: 0

mithro/ixo-usb-jtag Fork of svn2github/ixo-usb-jtag

usb-jtag - Altera USB Blaster Emulation with a FX2

Language: C++ - Size: 181 KB - Last synced at: 1 day ago - Pushed at: almost 4 years ago - Stars: 70 - Forks: 31

romybompart/Basys3-clock-alarm-with-buzzer

Digital clock implemented in vhdl for the Basys 3 Board from Digilent.

Language: VHDL - Size: 177 KB - Last synced at: about 2 months ago - Pushed at: over 4 years ago - Stars: 6 - Forks: 0

asankaSovis/Bidirectional_Transmitter

📡 This project was intended to develop a bidirectional transmitter and reciever device that uses Visible Light Communication (VLC) technology to transmit and recieve data from one device to another. In its basic form, data is transmitted as pulses of light where on means bit 1 and off means bit 0.

Language: HTML - Size: 30.1 MB - Last synced at: about 1 month ago - Pushed at: about 2 years ago - Stars: 4 - Forks: 0

pavel-demin/eclypse-z7-notes

Notes on the Eclypse Z7 development board

Language: C - Size: 416 KB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 10 - Forks: 2

charkster/cmod_a7_spi_sram

SPI slave to External SRAM interface for Cmod A7

Language: SystemVerilog - Size: 13.7 KB - Last synced at: 2 months ago - Pushed at: over 2 years ago - Stars: 6 - Forks: 1

adwuard/xSynth-go

Portable FPGA based Synthesizer/DSP processor

Language: Hack - Size: 52.8 MB - Last synced at: 11 months ago - Pushed at: 11 months ago - Stars: 1 - Forks: 0

embed-dsp/ed_digilent_adept

Install of Digilent Adept 2 Runtime and Utilities

Language: Makefile - Size: 12.7 KB - Last synced at: 12 months ago - Pushed at: 12 months ago - Stars: 3 - Forks: 0

SemKirkels/cmod_a7_breakout

A simple breakout board for the Digilent CMOD A7

Language: Tcl - Size: 14.6 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

hpaluch/crnr-ii-intro

Introductory Verilog project for Digilent CoolRunner-II Starter Board featuring Xilinx XC2C256-7-TQ144 CPLD

Language: HTML - Size: 2.13 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 1 - Forks: 1

pavel-demin/usb104-a7-notes

Notes on the USB104 A7 development board

Language: Tcl - Size: 1.12 MB - Last synced at: 6 months ago - Pushed at: 6 months ago - Stars: 0 - Forks: 0

devsaurus/Pynq-Cora-Z7-07S Fork of dspsandbox/Pynq-Cora-Z7-07S

Base files for building PYNQ on Digilent's Cora Z7-07S

Language: VHDL - Size: 16.3 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

devsaurus/Pynq-Cora-Z7-10 Fork of dspsandbox/Pynq-Cora-Z7-10

Base files for building PYNQ on Digilent's Cora Z7-10

Language: VHDL - Size: 15.5 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

mkostrun/chipkit

I2c library with sensor examples for chipkit/digilent/pic32 development boards

Language: C++ - Size: 57.6 KB - Last synced at: over 1 year ago - Pushed at: almost 7 years ago - Stars: 1 - Forks: 1

mattuna15/merlin

Learn how to create your own 32-bit system from scratch.

Language: Assembly - Size: 19 MB - Last synced at: about 1 year ago - Pushed at: about 3 years ago - Stars: 11 - Forks: 2

ilya-epifanov/digilent-waveforms

Language: C - Size: 611 KB - Last synced at: 2 days ago - Pushed at: about 6 years ago - Stars: 2 - Forks: 0

ravikumargrk/PyOpenScope

Python (3.8) code that runs on your PC or RPi, interacts with OpenScope MZ (by digilent) over USB to automate the process of collecting data from openscope.

Language: Python - Size: 456 KB - Last synced at: over 1 year ago - Pushed at: about 4 years ago - Stars: 2 - Forks: 0

oliviercotte/Digilent-Atlys-Boot-Linux-Image

Digilent Atlys Board Linux Flash Image

Size: 9.34 MB - Last synced at: over 1 year ago - Pushed at: about 7 years ago - Stars: 2 - Forks: 0

DiegoRosales/Zybo_Sampler

Audio Sampler for Zybo

Language: C - Size: 43.1 MB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 3 - Forks: 1

Mazan-ka/ps2_mouse_interface

Change the color of square on display via vga with mouse PS2 protocol

Language: Verilog - Size: 9.77 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0

hex-five/multizone-fpga Fork of sifive/freedom

This repository contains the hardware design source files of the Hex Five X300 RISC-V SoC. The X300 SoC is Hex Five's official reference platform for its MultiZone Security Trusted Execution Environment and MultiZone Security Trusted Firmware. The X300 is an enhanced secure version of the - now archived - SiFive's Freedom E300 Platform built around the RISC-V Rocket chip originally developed at U.C. Berkeley.

Language: Scala - Size: 212 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 24 - Forks: 5

charkster/cmod_a7_pattern_generator_v1

Language: SystemVerilog - Size: 157 KB - Last synced at: 2 months ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

EMATech/zynq_book_pynq-z1

Zynq Book Tutorials adapted for the Digilent PYNQ-Z1

Language: Tcl - Size: 6.84 KB - Last synced at: 3 months ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

marcvhoof/PYNQ_GenesysZU Fork of Xilinx/PYNQ

Fork from PYNQ branch with fixes and modifications for Digilent Genesys Zu.

Language: Jupyter Notebook - Size: 153 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0

tmahlburg/picosoc-basys3

Wrapper module for the PicoSoC to support the Digilent Basys 3

Language: Verilog - Size: 7.81 KB - Last synced at: 2 months ago - Pushed at: about 4 years ago - Stars: 1 - Forks: 0

mariusgreuel/Analog-Discovery-Adapter

Pin Header Adapter for Analog Discovery USB Oscilloscope

Size: 278 KB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 2 - Forks: 0

Darazaki/RTCCI2C-Fixed

A version of Digilent's RTCCI2C library that has been tweaked to work with modern Arduino

Language: C++ - Size: 158 KB - Last synced at: about 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0

riccardonicolaidis/PmodSD_Arty_A7_Project

In this project I wanted to implement a microprocessor on an FPGA with the ability to write files onto an SD card (micro SD in particular) exploiting the Arty A7 development board and the Digilent PModSD.

Language: VHDL - Size: 144 MB - Last synced at: almost 2 years ago - Pushed at: about 3 years ago - Stars: 0 - Forks: 1

cajt/cmod-a7-35t_leon3

GRLIB GPL support for Digilent CMOD A7 35T board

Language: VHDL - Size: 2.2 MB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 3 - Forks: 1

Digilent/WaveForms-SDK-Getting-Started-Cpp

Demo package for the WaveForms SDK Getting Started guide and multiple test scripts for different instruments.

Language: C++ - Size: 155 KB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 1

riccardonicolaidis/Sampler_Pmod_AD1

Implementation of a sampler using the XADC mounted on the Arty A7-35T development board and the PmodAD1 by Digilent (AD7476A).

Language: VHDL - Size: 26 MB - Last synced at: almost 2 years ago - Pushed at: about 3 years ago - Stars: 0 - Forks: 0

riccardonicolaidis/project_getting_started_Vivado_Vitis

Personal revision of the tutorial "Getting started with Vivado and Vitis for Baremetal system" by Digilent.

Language: VHDL - Size: 87.8 MB - Last synced at: almost 2 years ago - Pushed at: about 3 years ago - Stars: 0 - Forks: 0

knack-supply/curve-tracer

A companion app for AD2 curve tracer

Language: Rust - Size: 10.1 MB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 7 - Forks: 1

joseguerra3000/PIC32-Libraries

My own set of libraries for PIC32 Microcontroller Family

Language: C - Size: 236 KB - Last synced at: about 2 years ago - Pushed at: almost 7 years ago - Stars: 1 - Forks: 1

joseguerra3000/temperature-module

Temperature module compatible with arduino and digilent cerebot. Useful for calibrating thermoresistors. Able to use three temperature sensors at the same time (LM35, AD22103, Thermoresistor).

Language: Arduino - Size: 934 KB - Last synced at: about 2 years ago - Pushed at: over 7 years ago - Stars: 1 - Forks: 0

mmaguero/MII-SC16-17

[SC-MII-UGR-2016-17] Proyectos de la asignatura "Sistemas Críticos" del Máster Universitario en Ingeniería Informática del curso 2016-17 de la UGR

Language: C - Size: 44.6 MB - Last synced at: about 2 years ago - Pushed at: almost 8 years ago - Stars: 0 - Forks: 0