acoustic-warfare/FPGA-sampling

Sampling and processing of audio data from microphone arrays

Language: VHDL - Size: 50.1 MB - Last synced at: 6 days ago - Pushed at: 6 days ago - Stars: 6 - Forks: 1

us-irs/zynq7000-rs

Native Rust support for AMD Zynq 7000 SoC bare-metal programming

Language: Rust - Size: 194 KB - Last synced at: 6 days ago - Pushed at: 6 days ago - Stars: 0 - Forks: 0

viktor-nikolov/ILI9488-Xilinx

ILI9488 TFT SPI display library for Xilinx SoC and FPGA

Language: C - Size: 51.7 MB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 8 - Forks: 2

peteut/migen-axi

AXI support for Migen/MiSoC

Language: Python - Size: 103 KB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 27 - Forks: 19

dan-lara/Spectrum-Analyzer

This project aims to develop a spectrum analyzer system using the Zynq-7000 board. The system will capture audio input (I2S), process it through a well-defined internal architecture, and output the data via DMA to a VGA screen. The VGA screen will display the signal as a frequency spectrum using FFT (Fast Fourier Transform).

Language: C - Size: 2.56 MB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 0 - Forks: 0

EMATech/zynq_book_pynq-z1

Zynq Book Tutorials adapted for the Digilent PYNQ-Z1

Language: Tcl - Size: 6.84 KB - Last synced at: 14 days ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

xddcore/OpenNNA

一个开源的FPGA神经网络加速器。

Language: C++ - Size: 52.5 MB - Last synced at: about 2 months ago - Pushed at: almost 2 years ago - Stars: 160 - Forks: 13

pinguz97/Zynq-SoM

Kicad design files for a Zynq 7020 SoM

Language: HTML - Size: 32.6 MB - Last synced at: 2 months ago - Pushed at: 2 months ago - Stars: 11 - Forks: 5

Teddy-van-Jerry/sdr-psk-fpga

Dual-Mode PSK Transceiver on SDR With FPGA

Language: Verilog - Size: 281 MB - Last synced at: 2 months ago - Pushed at: 8 months ago - Stars: 28 - Forks: 13

duartegalvao/ArduZynq-Tutorials

Simple tutorials for getting started with programming on Trenz ArduZynq boards.

Size: 1.3 MB - Last synced at: 3 months ago - Pushed at: over 5 years ago - Stars: 7 - Forks: 1

sebastien-guerrache/doom_zynq7000

This repo is a port of doomgeneric (itself based on Chocolate Doom) on the evaluation board Digilent Zybo Z7 built around the Zynq 7000 SoC (bare metal).

Language: C - Size: 19.6 MB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

qubeck78/tangerineZ7_20_vitis

Vitis workspace for Tangerine Z7_20 SOC

Language: C - Size: 37 MB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

qubeck78/tangerineZ7_20

SOC with vga/sound/ps2 keyboard for Qmtech Zynq Z7020 board

Language: HTML - Size: 9.01 MB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

t-kuha/snickerdoodle-black

Projects for snickerdoodle black

Language: HTML - Size: 33.4 MB - Last synced at: 6 months ago - Pushed at: 6 months ago - Stars: 1 - Forks: 1

kimushu/tinythreads

POSIX-compatible tiny multi-threading library for Intel Nios II / Xilinx Zynq-7000

Language: C - Size: 204 KB - Last synced at: about 2 months ago - Pushed at: almost 5 years ago - Stars: 13 - Forks: 4

asankaSovis/Bidirectional_Transmitter

📡 This project was intended to develop a bidirectional transmitter and reciever device that uses Visible Light Communication (VLC) technology to transmit and recieve data from one device to another. In its basic form, data is transmitted as pulses of light where on means bit 1 and off means bit 0.

Language: HTML - Size: 30.1 MB - Last synced at: 2 months ago - Pushed at: about 2 years ago - Stars: 4 - Forks: 0

iynehz/zynq7000_examples

Collection of my example projects on my Zynq board

Language: Tcl - Size: 0 Bytes - Last synced at: 7 months ago - Pushed at: 7 months ago - Stars: 0 - Forks: 0

splAcharya/DigitalOscilloscope_Zynq7000Soc

A digital Oscilloscope designed using Zedboard (Zynq7000Soc). The input signal is sample and processed using Zedboard and the sample data is displayed using a Graphical User Interface which mimics an Oscilloscope.

Size: 71.2 MB - Last synced at: 7 months ago - Pushed at: almost 5 years ago - Stars: 18 - Forks: 4

b1f6c1c4/Deep-DarkFantasy

Global Dark Mode for ALL apps on ANY platforms.

Language: Verilog - Size: 3.95 MB - Last synced at: 2 months ago - Pushed at: over 1 year ago - Stars: 17 - Forks: 0

harshonyou/TSP-on-FPGA

FPGA-based hardware-accelerated, parallelized, and highly optimized solution for solving the Travelling Salesperson Problem (TSP) using Xilinx Zynq-7000 on a Digilent Zybo Z7-10 board, featuring FreeRTOS for real-time task management.

Language: C - Size: 13.7 KB - Last synced at: 10 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 1

San0519/ZYNQ_Study_Proj

Language: Tcl - Size: 2.78 MB - Last synced at: 10 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0

GOOD-Stuff/E2fsprogs

It is repository of E2fsprogs utility with instruction of building for Zynq SoC

Language: C - Size: 14.6 MB - Last synced at: about 1 year ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 0

GOOD-Stuff/AXI-DMA-API

Simple API for working with AXI DMA on Zynq-7000

Language: C++ - Size: 228 KB - Last synced at: about 1 year ago - Pushed at: about 5 years ago - Stars: 3 - Forks: 2

viktor-nikolov/lwIP-file-via-socket

A C++ ostream class (client) and a Python script (server) for writing a file on a remote system from a client using lwIP stack.

Language: C - Size: 10.5 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

r0tary/FPGA-Audio-Visualizer

An audio visualizer implemented on a Zedboard FPGA, that takes in audio and outputs it on a VGA supported monitor

Language: VHDL - Size: 306 MB - Last synced at: 4 months ago - Pushed at: about 2 years ago - Stars: 2 - Forks: 0

efetunca/Zynq-7000-TFTP-Server

A TFTP server running on Zynq-7000

Language: C - Size: 3.83 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

hamedtorky/XC7Z020

This repository contains the Board File of XC7Z020 and some code examples I created to gain experience and learn new topics about FPGA, especially ZYNQ.

Size: 325 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

hamedtorky/AX7Z020B

This repository contains the Board File of XC7Z020 and some code examples I created to gain experience and learn new topics about FPGA, especially ZYNQ.

Size: 306 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

ArioKian/Xilinx_Zynq7000_PS_SLCR_RegistersDrivers

Zynq-7000 PS side drivers for SLCR Registers.

Language: C - Size: 6.84 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

beehive-lab/FastPath_MP

FastPath_MP: An FPGA-based multi-path architecture for direct access from FPGA to NVMe SSD

Language: C - Size: 145 MB - Last synced at: about 1 year ago - Pushed at: about 4 years ago - Stars: 31 - Forks: 4

marchese/aximemcomp

This is a hardware project of an inline memory compressor that reduces the amount of memory used by embedded systems

Language: VHDL - Size: 212 KB - Last synced at: about 1 year ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 0

ArioKian/Xilinx_Zynq7000_ZynqUltraScalePlus_PS_SdCardDrivers

Zynq-7000 and Zynq UltraScale+ PS side drivers for SdCard.

Language: C - Size: 7.81 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

neeraj1397/Fast-Fourier-Transform-in-C

This repository contains the C code for ARM Implementation of FFT on Zynq-7000 APSoC from Xilinx.

Language: C - Size: 2.15 MB - Last synced at: over 1 year ago - Pushed at: about 4 years ago - Stars: 5 - Forks: 2

dsa-shua/FPGA-SystolicArray

Working 8x8 systolic array hardware implemented in Xilinx Vivado, operated and controlled in software using Xilinx Vitis

Language: SystemVerilog - Size: 1.59 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

2uger/petalinux_notes

Language: SystemVerilog - Size: 10.7 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 0

Hello-FPGA/BISS-C-Board

This is 8 channels BISS-C FPGA hardware board design

Size: 12.3 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 4 - Forks: 2

hz12opensource/libresdr

Firmware with overclock support for LibreSDR (PlutoSDR clone with Zynq 7020), 27.5 MSPS sample rate over Gigabit Ethernet with libiio/PlutoSDR API

Language: Shell - Size: 4.85 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 6 - Forks: 1

mariobarbareschi/xenomai-zynq

A script automation project for compiling Xenomai on a Zynq-7000 FPGA

Language: Shell - Size: 58.6 KB - Last synced at: about 1 year ago - Pushed at: about 7 years ago - Stars: 4 - Forks: 2

CSpyridakis/Reconfigurable-Computing 📦

Introduction in Reconfigurable Computing (using reconfigurable Systems-on-Chip rSoC)

Language: C++ - Size: 114 MB - Last synced at: 6 days ago - Pushed at: over 4 years ago - Stars: 2 - Forks: 2

der-mur/zynq-cpp-sandbox

This is my sandbox for exploring the use of C++ to develop projects for the AMD (Xilinx) Zynq. One of the aims is to begin the process of creating a range of c++ drivers that can be re-used for other Zynq-7000/Ultrascale/Microblaze designs. The IDE is Vivado/Vitis 2023.2 (Classic version).

Language: HTML - Size: 34 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

erwanregy/Neural-Network-on-an-FPGA

Implements a fully connected dense neural network in SystemVerilog, synthesisable to an FPGA for neural network computation acceleration

Language: SystemVerilog - Size: 3.1 MB - Last synced at: over 1 year ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

der-mur/zynq-freertos-sandbox

This is my sandbox for experimenting with the features offered by the AMD (Xilinx) FreeRTOS port. The main platform used is the Digilent Zybo-z7-20. The implemented system is quite simple, comprising a range of GPIO features (LEDs, buttons, switches, and test outputs for monitoring) and two UART communication channels.

Language: C - Size: 32.8 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

Hello-FPGA/ZYNQ7020_Core_Board

This is xc7z020clg400 FPGA hardware core board design

Size: 17.3 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 5 - Forks: 4

yohanes-erwin/handsonembedded

Hands-On Embedded's Repository

Language: JavaScript - Size: 354 KB - Last synced at: over 1 year ago - Pushed at: over 5 years ago - Stars: 3 - Forks: 0

yohanes-erwin/zynq7000

[Course] Hands-On ZYNQ: Mastering AXI4 Bus Protocol

Language: Verilog - Size: 23.4 KB - Last synced at: over 1 year ago - Pushed at: over 5 years ago - Stars: 9 - Forks: 7

viktor-nikolov/MicroZed-carrier-board

MicroZed development carrier board

Language: C - Size: 39.1 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

moritz-meier/armv7a

armv7a bare-metal Rust support

Language: Rust - Size: 20.5 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

lfarcaro/ARINC653_ARMV7A_Z7000

Real-Time Operating System (RTOS) for Xilinx Zynq-7000 Cortex-A9 (ARMv7-A) multi-core SoCs (ZedBoard, PicoZed, MicroZed and similars) based on the ARINC 653 Part 1 specification

Language: C - Size: 749 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 5 - Forks: 2

MakarenaLabs/Common-PL-Devices-on-PYNQ

Integration on PL side of Zynq7000 for PYNQ framework of common industrial devices (GPIO, I2C, SPI and UART)

Language: Jupyter Notebook - Size: 895 KB - Last synced at: almost 2 years ago - Pushed at: almost 4 years ago - Stars: 20 - Forks: 3

neeraj1397/Performance-Analysis-of-Parallel-Prefix-Adders-Using-Zynq-7000-APSoC

Performed a comparative study of Parallel Prefix Adders using Verilog HDL on Zynq-7000 APSoC (PL) from XIlinx. Circuits are simulated, synthesized and implemented using Vivado Design Suite.

Language: Verilog - Size: 653 KB - Last synced at: over 1 year ago - Pushed at: about 4 years ago - Stars: 6 - Forks: 2

exarchou/ZedBoard_Zynq_Embedded_System

Custom AXI IPs and driving of GPIOs with a ZYNQ-7000 on a ZedBoard

Language: VHDL - Size: 77.7 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0

Redns/vhes Fork of openasic-org/xk265

Video hevc encode system

Language: C - Size: 770 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 1 - Forks: 0

exarchou/I2S-transceiver-ZYNQ-7000-SoC

Digital Circuit Design using Verilog in Vivado with a ZedBoard containing a Xilinx ZYNQ®-7000 SoC.

Language: VHDL - Size: 16.7 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

narendiran1996/vga_controller

Implementation of a VGA Controller in Verilog (Both Graphics Mode and Text Mode)

Language: Jupyter Notebook - Size: 7.66 MB - Last synced at: almost 2 years ago - Pushed at: almost 4 years ago - Stars: 4 - Forks: 0

amamory/axis-protocol-checker

AXI stream protocol checking design

Language: Tcl - Size: 86.9 KB - Last synced at: 3 months ago - Pushed at: almost 5 years ago - Stars: 2 - Forks: 0

XiangYyang/AGV

Automatic guided vehicle, including the AHRS, two outputs brushed-motor driver, the radio control and image transmission, and structural parts

Language: SCSS - Size: 1.2 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

briansune/AD9361-FM-Radio-Verilog-LVDS

AD9361 FM Radio Verilog LVDS

Language: Coq - Size: 16.8 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 2 - Forks: 1

Stanlazy/ZYNQ_Ruler

Yet Another XC7Z010 Board

Size: 6.88 MB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 10 - Forks: 1

Stanlazy/7z010_ddr

4-Layer XC7Z010 DDR3 Layout

Size: 233 KB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 11 - Forks: 2

ssincan/kvm-ip-zynq

KVM over IP Gateway targeting Zynq-7000 SoC

Language: VHDL - Size: 6.2 MB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 17 - Forks: 5

svenssonjoel/GpioPerformanceTesterGUI

Gui for a zynq based GPIO performance testing "rig".

Language: C++ - Size: 300 KB - Last synced at: 2 months ago - Pushed at: about 6 years ago - Stars: 1 - Forks: 1

KindaM3h/SpaceVNXBaseBoard

SpaceVNX (VITA 74.4) carrier based on Zynq-7000.

Size: 23.8 MB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 2 - Forks: 2

embedded-explorer/Zynq7000-Video-Interfacing

This repository documents Interfacing HDMI and VGA with Pynq Z2 Board using Vivado block design and RTL.

Language: C - Size: 1.41 MB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 5 - Forks: 1

fred-framework/meta-fred

Yocto layer for the FRED framework

Language: BitBake - Size: 134 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 4 - Forks: 0

KindaM3h/SpaceVNXSDR-hardware

VITA 74 Compilant-ish SDR Payload.

Size: 247 MB - Last synced at: almost 2 years ago - Pushed at: about 2 years ago - Stars: 2 - Forks: 1

Mon-ius/petalinux-docker-image 📦

Github repo for monius/petalinux in docker hub.

Language: Dockerfile - Size: 93 MB - Last synced at: about 2 years ago - Pushed at: almost 6 years ago - Stars: 4 - Forks: 2

LewisCollum/ZyboZ7_Zynq-I2C-SPI 📦

The ZyboZ7's Zynq-7000 processor polls data from an ADC through I2C. The captured data is then sent to a Sparkfun 7-Segment via SPI. Other information is sent to an LCD (with a custom IP LCD driver) that interfaces with the Zynq-7000.

Language: C - Size: 61.3 MB - Last synced at: about 2 months ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0

LewisCollum/ZyboZ7_LED 📦

Simple LED test for the ZyboZ7 Zynq processor.

Language: VHDL - Size: 22 MB - Last synced at: about 2 years ago - Pushed at: over 6 years ago - Stars: 1 - Forks: 0

arokasprz100/HDL-Safe 📦

Simple safe lock mechanism written in SystemVerilog.

Language: SystemVerilog - Size: 60.4 MB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 4 - Forks: 0

hossein1387/ZYBO

This repository contains my Linux builds and projects for ZYBO Zynq dev board

Language: Tcl - Size: 14.6 MB - Last synced at: over 2 years ago - Pushed at: over 8 years ago - Stars: 6 - Forks: 5

NekoSilverFox/ZYNQ

⚙️ 基于 Zynq-7 全可编程 SoC 的设计

Language: HTML - Size: 499 MB - Last synced at: over 2 years ago - Pushed at: over 3 years ago - Stars: 8 - Forks: 7

sarthi92/boron_codesign

ZYNQ7 FPGA Co-design of BORON Cipher

Language: Verilog - Size: 42 KB - Last synced at: over 2 years ago - Pushed at: over 6 years ago - Stars: 2 - Forks: 1

mohammadasim98/Xilinx-DPUV3.0-Vivado-Proj

Deep Learning Processing Unit (DPU IP) integration with Application Processing Unit (APU) using (Zynq-7000 PS) in Xilinx Vivado Design Suite

Language: VHDL - Size: 281 MB - Last synced at: almost 2 years ago - Pushed at: almost 4 years ago - Stars: 2 - Forks: 0

coldnew/zybo-templates

Basic project template for Xilinx zynq-7000 ZYBO board

Language: C - Size: 3.02 MB - Last synced at: 3 months ago - Pushed at: about 7 years ago - Stars: 1 - Forks: 2

fred-framework/fred-linux-fpga-mgr-fmod

Fred FPGA manager test driver

Language: C - Size: 30.3 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

VenciFreeman/Guetzli

Try to embed it on Zynq board.

Language: C++ - Size: 25.4 MB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 2 - Forks: 2

fred-framework/fred-framework

Main repository to install FRED

Language: CMake - Size: 20.5 KB - Last synced at: over 2 years ago - Pushed at: over 3 years ago - Stars: 3 - Forks: 0

fred-framework/dart

FPGA design automation for real-time, dynamic partially reconfigurable application

Language: C++ - Size: 57.7 MB - Last synced at: over 2 years ago - Pushed at: almost 3 years ago - Stars: 3 - Forks: 1

svenssonjoel/ZynqShell

Shell like program to run on the Zynq while experimenting

Language: C - Size: 145 KB - Last synced at: 2 months ago - Pushed at: over 6 years ago - Stars: 3 - Forks: 2

berniGelectronic/FPGA_Multimedia_Player

MSc Final Project

Language: C - Size: 2.68 MB - Last synced at: over 2 years ago - Pushed at: over 3 years ago - Stars: 4 - Forks: 2

t-kuha/zynq-library

Various Linux library files for Zynq-7000 series

Language: C++ - Size: 724 MB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 5 - Forks: 3

wataru030-XIAOHEI/xilinx_tcp_adc_data_recv

一个PLadc数据采集，PS以太网lwip接收数据到PC的vivado工程。

Size: 101 MB - Last synced at: over 2 years ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

mohammadasim98/Petalinux-Zedboard-Project

Petalinux project integrating Xilinx DPU v3.0 for Avnet Zedboard Zynq-7000 SoC

Language: Python - Size: 30.6 MB - Last synced at: almost 2 years ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

MicroTCA-Tech-Lab/i2c-xiic-atomic

i2c-xiic driver with added support for master_xfer_atomic()

Language: C - Size: 279 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

zslwyuan/Zynq_HLS_DDR_Dataflow_kernel_2mm

This is a project integrating HLS IP and CortexA9 on Zynq. This CPU-FPGA project, for a Matrix Multiplication Dataflow, is implemented with dataflow and DDR3 access with HLS. The Cortex A9 will print the result via UART and check the result by comparing the data with the one from CPU compuation

Language: VHDL - Size: 101 MB - Last synced at: about 2 years ago - Pushed at: almost 6 years ago - Stars: 11 - Forks: 2

amamory/axi_noc_counter_ip

A test IP that receives a packet from the NoC, increments its the payload, and sends the packet back to the source

Language: Tcl - Size: 32.2 KB - Last synced at: 3 days ago - Pushed at: almost 5 years ago - Stars: 1 - Forks: 0

amamory/zynq-hermes-noc-demo

A demonstrator of Hermes network-on-chip communicating with the ARM processor

Language: Tcl - Size: 74.2 KB - Last synced at: 3 months ago - Pushed at: almost 5 years ago - Stars: 1 - Forks: 2

jonakor/ZedBoard_prototyping

Hardware .tcl code and software .c code for ZedBoard prototyping

Language: C - Size: 71.3 KB - Last synced at: almost 2 years ago - Pushed at: about 5 years ago - Stars: 1 - Forks: 0

fred-framework/fred-linux-buffctl-kmod

Fred kernel module for shared buffers

Language: C - Size: 27.3 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

fred-framework/meta-retis

Yocto Image from Real-Time Systems Laboratory (ReTiS Lab), Scuola Superiore Sant'Anna (SSSA), Pisa

Language: BitBake - Size: 442 KB - Last synced at: over 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

jagkush/ZYNQ_based_traffic_light_controller

A final project for FPGA_SOC course

Language: HTML - Size: 34.8 MB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 1 - Forks: 0