An open API service providing repository metadata for many open source software ecosystems.

GitHub topics: xilinx-zynq

chungae9ri/slos

Simple Light OS source repository

Language: C - Size: 82.2 MB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 21 - Forks: 9

viktor-nikolov/ILI9488-Xilinx

ILI9488 TFT SPI display library for Xilinx SoC and FPGA

Language: C - Size: 51.7 MB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 8 - Forks: 2

EMATech/zynq_book_pynq-z1

Zynq Book Tutorials adapted for the Digilent PYNQ-Z1

Language: Tcl - Size: 6.84 KB - Last synced at: 27 days ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

j-schacht/xilinx_zcu102_trustzone_demo

Tutorial and base project: TEE on AMD Zynq UltraScale+ using Arm TrustZone

Language: C - Size: 69 MB - Last synced at: 8 days ago - Pushed at: about 1 year ago - Stars: 3 - Forks: 2

MeowLucian/SDR_FM_Radio

:radio: Using Software Designed Radio to transmit & receive FM signal

Language: Matlab - Size: 16.8 MB - Last synced at: 2 months ago - Pushed at: about 7 years ago - Stars: 44 - Forks: 21

DYGV/HLS_FFT

Design of High-Level Synthesis of Xilinx FFT IP core via FFT library

Language: Tcl - Size: 817 KB - Last synced at: 8 days ago - Pushed at: almost 2 years ago - Stars: 9 - Forks: 3

t-kuha/ultra96-unified

Ultra96 (v1 & v2) projects

Language: C - Size: 63 MB - Last synced at: 5 months ago - Pushed at: 5 months ago - Stars: 3 - Forks: 1

AmirhoseinMasoumi/Zynq-Core-Board

Zynq Ultrascale+ Core Board

Size: 3.49 MB - Last synced at: 4 months ago - Pushed at: over 3 years ago - Stars: 3 - Forks: 1

cracked-machine/poky_zynqmp_generic_test

Testing meta-xilnx/poky layers with QEMU

Language: BitBake - Size: 3.86 MB - Last synced at: 11 months ago - Pushed at: 11 months ago - Stars: 1 - Forks: 0

efetunca/Zynq-7000-TFTP-Server

A TFTP server running on Zynq-7000

Language: C - Size: 3.83 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

urbanij/DDFS

Direct digital frequency synthesizer in Verilog and VHDL.

Language: VHDL - Size: 9.56 MB - Last synced at: about 1 year ago - Pushed at: over 4 years ago - Stars: 3 - Forks: 2

JalalSayed1/N-bit-Multiplier

N-bit Multiplier implementation in VHDL

Language: VHDL - Size: 3.3 MB - Last synced at: about 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

JalalSayed1/N-bit-Full-Adder

N-bit Full Adders implementation in VHDL

Language: Tcl - Size: 19.1 MB - Last synced at: about 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

z1skgr/reconf-Computing__HLS

High Level synthesis of data transfer in Vivado, Vivado HLS

Language: C++ - Size: 53.2 MB - Last synced at: 7 days ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

ArioKian/Xilinx_Zynq7000_PS_SLCR_RegistersDrivers

Zynq-7000 PS side drivers for SLCR Registers.

Language: C - Size: 6.84 KB - Last synced at: about 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

vacagonzalo/soc-workflow-firmware

Example workflow project for firmware development in Vitis.

Language: C - Size: 318 KB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

ArioKian/Xilinx_Zynq7000_ZynqUltraScalePlus_PS_SdCardDrivers

Zynq-7000 and Zynq UltraScale+ PS side drivers for SdCard.

Language: C - Size: 7.81 KB - Last synced at: about 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

kevinhikaruevans/blackboard-esp32

Embedded library for the on-board ESP32 on the RealDigital Blackboard

Language: C - Size: 145 KB - Last synced at: about 1 year ago - Pushed at: over 4 years ago - Stars: 2 - Forks: 1

gonzafernan/cese-mys-zynq7

Microarquitecturas y Softcores - CESE - FIUBA

Language: Verilog - Size: 1.25 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

carlesfernandez/docker-petalinux

Docker image generation for Xilinx Petalinux Tools and Vivado

Language: Dockerfile - Size: 130 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 6 - Forks: 7

dwij2812/UART-Spectrum-Analyzer-for-Serial-Devices

The following Script can be used to generate certain mathematical functions on a micro controller or FPGA Device connected in serial based on the configuration selected by the the user and collect realtime data of the signal as generated by the device for spectrum analysis.

Language: VHDL - Size: 15 MB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 2 - Forks: 1

wurmmi/fm-radio

Master thesis project - Comparing a FM Radio implementation in VHDL versus high-level synthesis (HLS).

Language: VHDL - Size: 347 MB - Last synced at: almost 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 0

matthieu-labas/docker-petalinux

Docker image generation for generic Petalinux

Language: Dockerfile - Size: 76.2 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 17 - Forks: 2

gitzhangzhao/petalinux_2017.04

配置好的 petalinux 2017.04 Docker 安装环境

Language: Dockerfile - Size: 8.79 KB - Last synced at: over 2 years ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

sefaburakokcu/finn-quantized-classification

Low-Precision Neural Networks for Classification on PYNQ with FINN

Language: Python - Size: 41 KB - Last synced at: over 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0

wubinary/two_stream_soc

SOC of two_stream action recognition on ZCU102

Language: Jupyter Notebook - Size: 35.7 MB - Last synced at: over 2 years ago - Pushed at: over 4 years ago - Stars: 6 - Forks: 1

systemviewinc/visual-system-integrator

Visual System Integrator - Accelerate your embedded development

Language: Python - Size: 4.88 KB - Last synced at: about 2 years ago - Pushed at: almost 7 years ago - Stars: 6 - Forks: 4

ckevar/IIR-Filter

IIR Filter for audio application

Language: VHDL - Size: 10.7 KB - Last synced at: over 2 years ago - Pushed at: about 6 years ago - Stars: 1 - Forks: 4

kuoyaoming93/axi_uartlite_pynq Fork of parthpower/axi_uartlite_pynq

PYNQ-Z1/Z2 Compatible Python helper functions for AXI UARTLITE IP Core of Xilinx

Language: Tcl - Size: 15.9 MB - Last synced at: over 2 years ago - Pushed at: about 5 years ago - Stars: 0 - Forks: 0

JoseCVieira/JacobiMethod-HwSw-Architecture

Implementation of Jacobi method in a co-processing architecture Hw/Sw using FPGA (Field Programmable Gate Array) ZYBO Zynq-7000 Development Board for Co-Project Hw/Sw course.

Language: VHDL - Size: 196 MB - Last synced at: over 2 years ago - Pushed at: almost 7 years ago - Stars: 2 - Forks: 1