mikeroyal/VHDL-Guide

VHDL Guide

Language: VHDL - Size: 135 KB - Last synced: 10 days ago - Pushed: over 2 years ago - Stars: 39 - Forks: 4

Erfangholiz/My-VHDL

A dump for my VHDL projects, because I want to have a better understanding of Verilog and also Logic circuits.

Language: Verilog - Size: 383 KB - Last synced: 10 days ago - Pushed: 10 days ago - Stars: 0 - Forks: 0

dylanrichards/EGR480

EGR 480 - Digital Integrated Circuit Design and FPGAs

Language: VHDL - Size: 10.7 KB - Last synced: 23 days ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0

Zxis233/RISCV_example

A simple example on textbook

Language: Verilog - Size: 7.81 KB - Last synced: about 1 month ago - Pushed: about 1 month ago - Stars: 0 - Forks: 0

Charlie-Ramirez-Animation-Studios-de-MX/VHDL-Basicos

Programas Basicos en Lenguaje VHDL de Diseño Logico y Diseño de Circuitos Digitales para Uso y simulacion con QuartusII y los FPGA Cyclone III de Altera (Compilados y compatibles con la FPGA EP3C16F484C6N) Para Practica en la Licenciatura de Ingenieria Electrica Electronica e Ingenieria en Computación Bajo Licencia MIT

Language: VHDL - Size: 20.5 KB - Last synced: about 1 month ago - Pushed: about 1 month ago - Stars: 0 - Forks: 0

motcodes/VHDL-Code-Beispiele

HTBLuVA Salzburg VHDL code examples for Finals

Size: 4.38 MB - Last synced: about 2 months ago - Pushed: about 5 years ago - Stars: 1 - Forks: 0

sy2002/QNICE-FPGA

QNICE-FPGA is a 16-bit computer system for recreational programming built as a fully-fledged System-on-a-Chip in portable VHDL.

Language: Assembly - Size: 32.1 MB - Last synced: about 2 months ago - Pushed: about 2 months ago - Stars: 65 - Forks: 15

jagumiel/Data-Acquisition

This repository contains some examples of data acquisition over MATLAB, LabVIEW and VHDL.

Language: C - Size: 399 MB - Last synced: about 2 months ago - Pushed: about 2 months ago - Stars: 2 - Forks: 0

taffarel55/vhdl

Aqui eu tento documentar o que fiz enquanto estudava a linguagem de descrição de hardware VHDL. Pretendo aumentar a lista e categorizar também.

Language: VHDL - Size: 21.3 MB - Last synced: 2 months ago - Pushed: over 2 years ago - Stars: 0 - Forks: 0

fbv81bp/SHA-256_full_pipeline_in_VHDL

Fully pipelined SHA2-256 VHDL description with circular buffers instead of shift registers for low power.

Language: VHDL - Size: 205 KB - Last synced: 2 months ago - Pushed: about 1 year ago - Stars: 0 - Forks: 0

pronoym99/PN-Sequence-Generator

This is a simulation based VHDL code developed in Xilinx to demonstrate a 4-bit PN sequence generator.

Language: C++ - Size: 2.38 MB - Last synced: 3 months ago - Pushed: over 5 years ago - Stars: 2 - Forks: 0

AmelBENAIDA/Afficheur-7-segments-VHDL

Ce projet est un programme VHDL qui permet d'afficher les chiffres Hexadécimals (0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F)

Language: HTML - Size: 94.7 KB - Last synced: 3 months ago - Pushed: about 6 years ago - Stars: 0 - Forks: 0

alialaei1/HDLab-FPGA-Development-Board

Open source FPGA development platform

Language: VHDL - Size: 21.6 MB - Last synced: 3 months ago - Pushed: 10 months ago - Stars: 46 - Forks: 22

ShadowXBoss696/VHDL-Codes

VHSIC Hardware Description Language (VHDL) Example Codes

Language: VHDL - Size: 18.6 KB - Last synced: 3 months ago - Pushed: over 2 years ago - Stars: 0 - Forks: 0

CodiieSB/VHDL-PriorityEncoder4x2

A 4x2 priority encoder is a digital circuit that takes four input lines and encodes them into a two-bit binary output based on the priority of the input lines.

Language: VHDL - Size: 68.4 KB - Last synced: 3 months ago - Pushed: 3 months ago - Stars: 0 - Forks: 0

CodiieSB/VHDL-Half_Adder

A half adder is a digital circuit that performs addition of two binary digits, generating the sum bit and the carry bit.

Language: VHDL - Size: 66.4 KB - Last synced: 3 months ago - Pushed: 3 months ago - Stars: 0 - Forks: 0

CodiieSB/VHDL-ShiftRegister

A VHDL shift register is a digital circuit implemented that allows sequential shifting of data bits either to the left or right within the register.

Language: VHDL - Size: 61.5 KB - Last synced: 3 months ago - Pushed: 3 months ago - Stars: 0 - Forks: 0

CodiieSB/VHDL-ArtyA7_Blinky

The code allows anyone with the Artix A7 FPGA Board to Blink the On-Board LED for any predefined Frequency.

Language: Tcl - Size: 32.2 KB - Last synced: 3 months ago - Pushed: 3 months ago - Stars: 0 - Forks: 0

CodiieSB/VHDL-2x4Decoder

The VHDL code implements a 2x4 decoder, converting two input signals into four output signals based on the input combinations.

Language: VHDL - Size: 40 KB - Last synced: 3 months ago - Pushed: 3 months ago - Stars: 0 - Forks: 0

Awrsha/Digital-Systems

Digital systems lesson with Dr. Vahid Rostami Provided by Qazvin Islamic Azad University

Language: Verilog - Size: 890 KB - Last synced: 3 months ago - Pushed: 10 months ago - Stars: 1 - Forks: 0

jon6123/MAX10Blinky

a simple blinky project for Intel MAX10 - 10M08 Evaluation Kit

Language: VHDL - Size: 17.6 KB - Last synced: 4 months ago - Pushed: 4 months ago - Stars: 0 - Forks: 0

BongPeav/XC95108_VHDL

VHDL Example Using The Xilinx XC95108 and Xilinx ISE

Size: 70.3 KB - Last synced: 4 months ago - Pushed: 4 months ago - Stars: 0 - Forks: 0

hasandurna/8-bit-processor

The main source I used for this design is the following book; Introduction to Logic Circuits & Logic Design with VHDL by Brock J. LaMeresor

Language: VHDL - Size: 611 KB - Last synced: 5 months ago - Pushed: 5 months ago - Stars: 5 - Forks: 0

talhasevinc/FPGA

FPGA Digital Hardware Design

Language: VHDL - Size: 74.5 MB - Last synced: about 1 month ago - Pushed: over 2 years ago - Stars: 3 - Forks: 0

pos3id0nas/Epanadiamorfosima-VHDL-Code-with-TB

Language: Tcl - Size: 6.8 MB - Last synced: 6 months ago - Pushed: over 2 years ago - Stars: 1 - Forks: 0

seigtm/circuitry-spbpu-homework

This repository is dedicated to storing and managing homework assignments for the course "Digital Circuit Design: Modeling and Description Languages." The assignments primarily involve VHDL source code.

Language: VHDL - Size: 8.79 KB - Last synced: 6 months ago - Pushed: 6 months ago - Stars: 0 - Forks: 0

pratikbhuran/Up_Counter

VHDL implementation of Up counter.

Language: VHDL - Size: 13.7 KB - Last synced: 7 months ago - Pushed: over 3 years ago - Stars: 1 - Forks: 0

bilalkabas/Basys3-VHDL-Basics

This repository has basic examples in VHDL using Basys3 board.

Language: VHDL - Size: 39.1 KB - Last synced: about 1 month ago - Pushed: almost 4 years ago - Stars: 7 - Forks: 5

aliansgp/VHDL_Multipliers

Different Multipliers code in VHDL and Comparison

Language: C - Size: 1.35 MB - Last synced: 8 months ago - Pushed: over 1 year ago - Stars: 1 - Forks: 0

aliansgp/VHDL_Adders

Different adders code in VHDL and Comparison

Language: C - Size: 1.3 MB - Last synced: 8 months ago - Pushed: over 1 year ago - Stars: 1 - Forks: 0

hbusul/HelloVHDL

Language: VHDL - Size: 4.88 KB - Last synced: 9 months ago - Pushed: over 5 years ago - Stars: 0 - Forks: 0

josefdc/Laboratorio-Fundamentos-De-Electronica

Este repositorio es el hogar del curso de Fundamentos de Electrónica de la Universidad Tecnológica de Pereira. Aquí, los estudiantes y profesores pueden colaborar en el desarrollo y mejora continua del curso, compartiendo materiales didácticos, ejercicios prácticos, proyectos y más.

Language: VHDL - Size: 222 KB - Last synced: 9 months ago - Pushed: 9 months ago - Stars: 0 - Forks: 0

JochiSt/icebreaker-pipelineC

Using pipelineC to program the IceBreaker FPGA Board

Language: C - Size: 36.1 KB - Last synced: 9 months ago - Pushed: 9 months ago - Stars: 0 - Forks: 0

hk-117/VHDL

Some example of vhdl code, using ghdl and gtkwave.

Language: VHDL - Size: 30.3 KB - Last synced: 9 months ago - Pushed: over 1 year ago - Stars: 1 - Forks: 0

gholomia/Fusion

Crawling deep into the world of hardware description language, VHDL. My coursework for the digital design of computer systems course by Dr. M. Saheb Zamani.

Language: JavaScript - Size: 90.6 MB - Last synced: 10 months ago - Pushed: over 6 years ago - Stars: 5 - Forks: 0

Stavros/Multiplier4bit

A 4bit Multiplier in VHDL

Language: VHDL - Size: 2.94 MB - Last synced: 10 months ago - Pushed: over 4 years ago - Stars: 2 - Forks: 1

Stavros/FSM_CarAlarm

Finite-State Machine Design of a Simple Car Security Alarm on FPGA

Language: VHDL - Size: 39.1 KB - Last synced: 10 months ago - Pushed: over 4 years ago - Stars: 4 - Forks: 0

Stavros/4bitCounterParLoad

A 4bit Counter with Parallel Load including a Clock Divider and a BCD decoder

Language: VHDL - Size: 3.11 MB - Last synced: 10 months ago - Pushed: over 4 years ago - Stars: 2 - Forks: 0

giljr/Logica_Programavel

Estudo sobre FPGA - Nesse experimento implementamos a primeira opção de circuitos combinacionais tanto em TTL como em FPGA e os comparamos. Palavras chave: VHDL, FPGA, Cyclone IV, ASIC, Circuitos integrados, TTL, Sinais, ENTITY, ARCHITECTURE, Lógica Booleana, Portas Lógicas, AND, OR, NOT.

Language: Mathematica - Size: 17.1 MB - Last synced: 11 months ago - Pushed: 11 months ago - Stars: 0 - Forks: 0

mahdihaghverdi/cpu

Simple single cycle CPU written in VHDL

Language: VHDL - Size: 23.2 MB - Last synced: 11 months ago - Pushed: 11 months ago - Stars: 0 - Forks: 1

qzxtu/Candy-Machine

University practice exercise for learning VHDL usage, simulating a candy vending machine with a finite state machine architecture.

Language: VHDL - Size: 7.81 KB - Last synced: about 1 year ago - Pushed: about 1 year ago - Stars: 0 - Forks: 0

GoldOrange261/VHDL-Examples

This repository contains some VHDL code examples for solving various problems. VHDL is a hardware description language that can model the behavior and structure of digital systems. These code examples can help you learn and practice VHDL programming.

Language: VHDL - Size: 1.01 MB - Last synced: about 1 year ago - Pushed: about 1 year ago - Stars: 0 - Forks: 0

datacipy/VHDL

Příklady ke knize Data, čipy, procesory

Language: VHDL - Size: 29 MB - Last synced: almost 1 year ago - Pushed: over 3 years ago - Stars: 16 - Forks: 3

ichirodev/basic-cpu-vhdl

Basic CPU made in a hardware description language

Language: Verilog - Size: 194 KB - Last synced: about 1 year ago - Pushed: about 3 years ago - Stars: 2 - Forks: 0

Tanmaymundra/vhdl

This repository contains example of logic such as comparator, encoder, etc in vhdl. Feel Free to add other examples in this repository

Language: VHDL - Size: 76.2 KB - Last synced: about 1 year ago - Pushed: over 4 years ago - Stars: 2 - Forks: 0

tocache/Altera-Cyclone-II-FPGA

Repositorio de proyectos hechos en el Quartus II para el FPGA Cyclone II

Language: C - Size: 229 MB - Last synced: about 1 year ago - Pushed: almost 2 years ago - Stars: 5 - Forks: 1

ZahraAbtahi/8_Bit_VHDL_Project

Language: VHDL - Size: 386 KB - Last synced: about 1 year ago - Pushed: about 2 years ago - Stars: 2 - Forks: 0

bryan-hoang/ELEC-271-Digital-Systems 📦

VHDL Code for Labs done in a 2nd year Digital Systems course at Queen's University.

Language: VHDL - Size: 7.21 MB - Last synced: about 1 year ago - Pushed: over 5 years ago - Stars: 2 - Forks: 2

asl0007/DSD-VHDL-

PROGRAMS OF VHDL

Language: VHDL - Size: 2.26 MB - Last synced: about 1 year ago - Pushed: about 5 years ago - Stars: 1 - Forks: 0

DoCodeForever/vhdl

Size: 535 KB - Last synced: about 1 year ago - Pushed: over 1 year ago - Stars: 1 - Forks: 0

chclau/par2ser

Language: VHDL - Size: 15.6 KB - Last synced: over 1 year ago - Pushed: over 1 year ago - Stars: 1 - Forks: 0

lucagrammer/Working-Zone

Final Project - Reti Logiche. Politecnico di Milano, A.A. 2019-2020

Language: VHDL - Size: 6.55 MB - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 1 - Forks: 0

minji-o-j/Device-Programming

[Spring Semester 2020] Device Programming

Language: VHDL - Size: 98.6 KB - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 1 - Forks: 0

andrevale99/CD_ELE2715

Language: VHDL - Size: 533 KB - Last synced: about 1 year ago - Pushed: almost 2 years ago - Stars: 1 - Forks: 0

torland-klev/INF3430-Projects 📦

Language: VHDL - Size: 51 MB - Last synced: 6 months ago - Pushed: over 4 years ago - Stars: 1 - Forks: 0

s-gbz/VHDL-exercises-examples

Code examples from the Technical Computer Science (Technische Informatik) module.

Language: VHDL - Size: 3.12 MB - Last synced: about 1 year ago - Pushed: about 3 years ago - Stars: 7 - Forks: 1

jagumiel/VHDL-Basics

Some VHDL exercises.

Language: VHDL - Size: 565 KB - Last synced: 11 months ago - Pushed: about 1 year ago - Stars: 4 - Forks: 0

Prithvipatel007/Async_FIFO_VHDL

Language: VHDL - Size: 1.09 MB - Last synced: over 1 year ago - Pushed: about 2 years ago - Stars: 0 - Forks: 0

JulyWitch/vhdl_ghdl_examples

Simple VHDL examples using ghdl as compiler and wave generating

Language: VHDL - Size: 396 KB - Last synced: about 1 year ago - Pushed: almost 2 years ago - Stars: 9 - Forks: 0

VraiHack/FPGA-GAME-VGA-Connectivity

create your first game on FPGA

Language: HTML - Size: 1.54 MB - Last synced: about 1 year ago - Pushed: over 1 year ago - Stars: 2 - Forks: 0

Itzdan0ul/vhdl-spartan-6

Repository with a series of VHDL programs for the Spartan 6 Mojo v3 FPGA.

Language: VHDL - Size: 86.9 KB - Last synced: about 1 year ago - Pushed: over 1 year ago - Stars: 0 - Forks: 0

mcagriaksoy/VHDL-FPGA-LAB_PROJECTS

My Lab Assigments from Bachelor Degree, This repo includes the projects for digital systems II Lecture (EEM334)

Language: VHDL - Size: 575 KB - Last synced: about 1 year ago - Pushed: about 4 years ago - Stars: 14 - Forks: 2

aXon/vhdl-start

New to VHDL and need some examples to get started? This repo includes example projects (aimed at Diligent development boards) and building blocks to get started.

Size: 1000 Bytes - Last synced: about 1 year ago - Pushed: over 1 year ago - Stars: 0 - Forks: 0

AlicePagano/Collection-of-University-Assignments

Collection of University assignments done during my Master degree in Physics of Data at the University of Padova.

Language: Jupyter Notebook - Size: 165 MB - Last synced: 4 months ago - Pushed: over 3 years ago - Stars: 3 - Forks: 1

JoaoPNVieira/LSD

Laboratório de Sistemas Digitais - Universidade de Aveiro

Language: VHDL - Size: 112 MB - Last synced: about 1 year ago - Pushed: over 1 year ago - Stars: 0 - Forks: 0

chclau/basys3_Magellan

Magellan - A HW monitor/debugger for Basys 3

Language: VHDL - Size: 375 KB - Last synced: over 1 year ago - Pushed: over 1 year ago - Stars: 0 - Forks: 0

manish-9245/VHDL-Programs

This repository contains VHDL files of different Digital Designs.

Language: VHDL - Size: 4.49 MB - Last synced: over 1 year ago - Pushed: almost 3 years ago - Stars: 4 - Forks: 0

Sukhendu2002/coa-lab-vhdl-codes

Here you can find verious VHDL code with test banch

Language: VHDL - Size: 357 KB - Last synced: about 2 months ago - Pushed: about 2 years ago - Stars: 1 - Forks: 1

juan-montenegro/VHDL-CourseWork

Language: VHDL - Size: 2.93 KB - Last synced: 11 months ago - Pushed: almost 2 years ago - Stars: 0 - Forks: 0

CodeWithAbbas/FPGA-Designing

It contains the VHDL coding of basic combinational and sequential circuits as well as top level design including Datapath and Controller

Size: 37.1 KB - Last synced: about 1 year ago - Pushed: about 2 years ago - Stars: 0 - Forks: 0

Miladrzh/vhdl-basic-computer

Implementation of a basic CPU using VHDL.

Language: VHDL - Size: 714 KB - Last synced: about 1 year ago - Pushed: over 4 years ago - Stars: 1 - Forks: 0

Davide-DD/text-controller

Show phrases on VGA displays fast and easily (using a framebuffer)

Language: VHDL - Size: 19.5 KB - Last synced: about 1 year ago - Pushed: over 5 years ago - Stars: 5 - Forks: 0

fennecfox38/VHDLtraining

Sample VHDL Example

Language: VHDL - Size: 64.5 KB - Last synced: about 1 year ago - Pushed: over 2 years ago - Stars: 0 - Forks: 0

CodexLink/Time-Based-Clap-Pattern-Lock-VHDL08

A Time-Based Clap Lock Mechanism in Lower-Level Machine Implementation. Created by 4-Member Team VHDL Project in CPE 016 — Introduction to VHDL | Implemented in HDL 2008.

Language: VHDL - Size: 688 KB - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 1 - Forks: 0

SamanKhamesian/Hardware-Modeling-Using-VHDL

This repository will hold source codes for some simple projects based on VHDL language

Language: VHDL - Size: 216 KB - Last synced: 12 months ago - Pushed: about 5 years ago - Stars: 1 - Forks: 0

DanielSouzaBertoldi/vhdl

Este projeto foi feito para a disciplina de Laboratório de Arquitetura de Computadores, e tem como objetivo implementar um MIPS simplificado utilizando-se da linguagem VHDL. As instruções implementadas para o microprocessador são: ADD, ADDI, SUB, LW, SW, BEQ, BNE, JAL, J, SLT, AND, OR, JR, SLL, SRL

Language: VHDL - Size: 5.28 MB - Last synced: 5 days ago - Pushed: almost 4 years ago - Stars: 1 - Forks: 1

alexandregranzerguay/vhdl-templates

Templates for most common VHDL components, ex: state machines, basic components, test benchs, etc. Quickly get started while following a style guide recommended by Xilinx

Language: VHDL - Size: 4.21 MB - Last synced: about 1 year ago - Pushed: almost 6 years ago - Stars: 1 - Forks: 0

bimalka98/Hardware-Description-Languages

VHDL and Verilog ❄

Language: VHDL - Size: 5.28 MB - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 1 - Forks: 0

3ZadeSSG/VLSI-VHDL-Programs

VHDL Program Examples

Language: HTML - Size: 678 KB - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0

davidcawork/ElectronicDesign-uah

UAH Telecommunication Engineering Master's Electronic Design Subject

Language: VHDL - Size: 10.2 MB - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0

HugoJF/alarm

[DONE] Alarm control circuit example in VHDL

Language: VHDL - Size: 1.95 KB - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0

HugoJF/alu

[DONE] ALU example in VHDL

Language: VHDL - Size: 1000 Bytes - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0

HugoJF/multiplex2x1

[DONE] 2 to 1 multiplexer example in VHDL

Language: VHDL - Size: 1000 Bytes - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0

HugoJF/andor

[DONE] AND/OR gate example in VHDL

Language: VHDL - Size: 1.95 KB - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0

HugoJF/addsub

[DONE] Adder/Subtractor example in VHDL

Language: VHDL - Size: 1000 Bytes - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0

SergioLavao/ALU

Arithmetic Logic Unit

Language: VHDL - Size: 35.2 KB - Last synced: about 1 year ago - Pushed: almost 4 years ago - Stars: 0 - Forks: 0

Malcolmnixon/MachX02Breakout

Repository for Lattice MachX02 Breakout Board Examples

Language: VHDL - Size: 104 KB - Last synced: about 1 year ago - Pushed: almost 4 years ago - Stars: 0 - Forks: 0

ckevar/IIR-Filter

IIR Filter for audio application

Language: VHDL - Size: 10.7 KB - Last synced: about 1 year ago - Pushed: about 5 years ago - Stars: 1 - Forks: 4

FranciscoMotta/VHDL_CODES

Some VHDL codes for projects

Language: VHDL - Size: 3.91 KB - Last synced: about 1 year ago - Pushed: almost 4 years ago - Stars: 1 - Forks: 0

ToraNova/dcd-quartus-draft

Draft repository for Digital Computer Design @ MMU

Language: VHDL - Size: 10.3 MB - Last synced: about 1 year ago - Pushed: about 4 years ago - Stars: 0 - Forks: 0

tassoneroberto/vhdl-projects

Some basic VHDL projects.

Language: VHDL - Size: 2.51 MB - Last synced: about 1 year ago - Pushed: about 5 years ago - Stars: 0 - Forks: 0