GitHub topics: vhdl-testbench
Choaib-ELMADI/32-bit-processor-with-vhdl Fork of ZIKOAR/32-bit-processor-with-vhdl
Forked from ZIKOAR's 32-bit-processor-with-vhdl repository.
Language: VHDL - Size: 6.84 KB - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

ZIKOAR/32-bit-processor-with-vhdl
A 32-bit VHDL processor with 26 instructions, including jumps, branches, and function calls. Implementing an FSM for execution control and testing using Quartus and ModelSim.
Language: VHDL - Size: 6.84 KB - Last synced at: about 2 months ago - Pushed at: 3 months ago - Stars: 1 - Forks: 1

mohammadamintahmasbi/AMA-Cach-RAM
Final project of VHDL lession, AMA Cach-RAM
Language: C - Size: 3.92 MB - Last synced at: 16 days ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0

MohammedS2lah/Digital_Design_With_VHDL
In this repository, I'll provide a simple, organized collection of VHDL designs and tutorials to help anyone learn and practice digital design using VHDL.
Language: VHDL - Size: 36.1 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

Var7600/VHDL-GENERATOR
App that Generate VHDL Code and Testbench template file
Language: HTML - Size: 7.15 MB - Last synced at: about 1 month ago - Pushed at: 4 months ago - Stars: 3 - Forks: 0

Var7600/VHDL-TestBench
A simple python script to generate a VHDL testbench template given an entity-architecture declaration passed as argument(s) as a file(s)
Language: Python - Size: 22.5 KB - Last synced at: about 1 month ago - Pushed at: 4 months ago - Stars: 2 - Forks: 0

Izzat-Kawadri/Simple-VHDL-Calculator
a basic calculator designed using VHDL to perform simple arithmetic operations.
Language: VHDL - Size: 139 KB - Last synced at: 2 months ago - Pushed at: 8 months ago - Stars: 0 - Forks: 0

heikoengel/sparsemem
A resource-friendly VHDL model for large memory simulations
Language: VHDL - Size: 18.6 KB - Last synced at: 10 months ago - Pushed at: over 3 years ago - Stars: 4 - Forks: 1

alessda/door_lock
Language: C - Size: 1.56 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 1 - Forks: 0

JC-LL/vhdl_tb
A simple VHDL testbench generator
Language: VHDL - Size: 54.7 KB - Last synced at: about 1 month ago - Pushed at: almost 4 years ago - Stars: 3 - Forks: 0

broccolingual/vhdl-test-generator
Tool for generating VHDL testbench from VHDL made by Golang.
Language: Go - Size: 2.93 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

pratikbhuran/Up_Counter
VHDL implementation of Up counter.
Language: VHDL - Size: 13.7 KB - Last synced at: over 1 year ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 0

idataaki/vhdl-projects
all projects of vhdl course of university
Language: VHDL - Size: 883 KB - Last synced at: about 2 years ago - Pushed at: over 3 years ago - Stars: 3 - Forks: 0

ZahraAbtahi/8_Bit_VHDL_Project
Language: VHDL - Size: 386 KB - Last synced at: about 2 years ago - Pushed at: about 3 years ago - Stars: 2 - Forks: 0

VXAPPS/cmake-ghdl-compiler
GHDL Compiler Definition for CMake
Language: CMake - Size: 32.2 KB - Last synced at: 10 months ago - Pushed at: over 3 years ago - Stars: 2 - Forks: 0

chclau/par2ser
Language: VHDL - Size: 15.6 KB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

eimon96/VHDL
Language: VHDL - Size: 342 KB - Last synced at: 2 months ago - Pushed at: about 4 years ago - Stars: 1 - Forks: 0

lucagrammer/Working-Zone
Final Project - Reti Logiche. Politecnico di Milano, A.A. 2019-2020
Language: VHDL - Size: 6.55 MB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 0

hussainmansour/4-bit-BCD-Counter
implementation of 4-bit BCD up/down counter. The counter work as follows: ● If input X = 0, the counter counts up. Otherwise, it counts down. ● If counting up, the counter’s value should be: 0000, 0001, 0010... ● If counting down: 0010, 0001, 0000...
Language: VHDL - Size: 15.6 KB - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0

JulyWitch/vhdl_ghdl_examples
Simple VHDL examples using ghdl as compiler and wave generating
Language: VHDL - Size: 396 KB - Last synced at: almost 2 years ago - Pushed at: almost 3 years ago - Stars: 9 - Forks: 0

aXon/vhdl-start
New to VHDL and need some examples to get started? This repo includes example projects (aimed at Diligent development boards) and building blocks to get started.
Size: 1000 Bytes - Last synced at: about 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

projektjoe/Networks-On-Chip-Router-VHDL
Language: VHDL - Size: 9.77 KB - Last synced at: 11 months ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

MusicalTester63/digital-electronics-1
VHDL course at Brno University of Technology
Language: VHDL - Size: 25.3 MB - Last synced at: 5 months ago - Pushed at: about 3 years ago - Stars: 0 - Forks: 0

taffarel55/vhdl
Aqui eu tento documentar o que fiz enquanto estudava a linguagem de descrição de hardware VHDL. Pretendo aumentar a lista e categorizar também.
Language: VHDL - Size: 21.3 MB - Last synced at: 3 months ago - Pushed at: over 3 years ago - Stars: 0 - Forks: 0

CodexLink/Time-Based-Clap-Pattern-Lock-VHDL08
A Time-Based Clap Lock Mechanism in Lower-Level Machine Implementation. Created by 4-Member Team VHDL Project in CPE 016 — Introduction to VHDL | Implemented in HDL 2008.
Language: VHDL - Size: 688 KB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 0

Feqzz/cache-controller
Simple cache controller in VHDL.
Language: VHDL - Size: 12.7 KB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0

SergioLavao/ALU
Arithmetic Logic Unit
Language: VHDL - Size: 35.2 KB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0

Srijan945/Simple_Processor
Basic Operations of a Processor in Xilinx
Language: C - Size: 6.02 MB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0
