GitHub topics: logical-circuits
markkurossi/mpc
Secure Multi-Party Computation (MPC) with Go. This project implements secure two-party computation with Garbled circuit protocol.
Language: Go - Size: 9.75 MB - Last synced at: 4 months ago - Pushed at: 8 months ago - Stars: 112 - Forks: 23

franciscoengenheiro/ticket-machine-fpga
Train ticket vending machine application designed for execution on an FPGA system. The application allows users to purchase tickets for various destinations and includes maintenance functionalities.
Language: Kotlin - Size: 10.8 MB - Last synced at: 4 months ago - Pushed at: over 1 year ago - Stars: 3 - Forks: 0

MHDtA-dev/LogiGates
Simple simulator of logical chains
Language: C++ - Size: 24.8 MB - Last synced at: 10 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0

gianpierodiblasi/LogicalCircuit
A JavaScript API to (visually) manage logical circuits
Language: JavaScript - Size: 293 KB - Last synced at: 10 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0

Erfangholiz/My-VHDL
A dump for my VHDL projects, because I want to have a better understanding of Verilog and also Logic circuits.
Language: Verilog - Size: 383 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

Farzadr98/Javascript-Karnaugh-map-solver
Hello there, welcome! This is a JavaScript algorithm that solves the 4x4 Karnaugh map. It is expandable to solve 2 and 3 variable tables as well, although it needs some slight changes not done yet.
Language: JavaScript - Size: 37.1 KB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 1 - Forks: 0

IRoyalX/Logical_Counter
UNI S3: a single digit logical ( BCD to 7Segment ) counter in Proteus
Size: 22.5 KB - Last synced at: 6 days ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

Yann39/truth-table-validator
Windows console application for validating truth tables
Language: C++ - Size: 87.9 KB - Last synced at: 3 days ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

nthparty/circuitry
Embedded domain-specific combinator library for the abstract assembly and automated synthesis of logical circuits.
Language: Python - Size: 157 KB - Last synced at: 25 days ago - Pushed at: over 2 years ago - Stars: 7 - Forks: 1

gholomia/Fusion
Crawling deep into the world of hardware description language, VHDL. My coursework for the digital design of computer systems course by Dr. M. Saheb Zamani.
Language: JavaScript - Size: 90.6 MB - Last synced at: almost 2 years ago - Pushed at: over 7 years ago - Stars: 5 - Forks: 0

amir78729/Logical-Circuits-Course-Final-Project
My Logical Circuits course Final Project - Fall98(2019) - VERILOG
Language: Verilog - Size: 3.52 MB - Last synced at: 4 months ago - Pushed at: almost 5 years ago - Stars: 1 - Forks: 0

leilibrk/Smart-Home-Management-System
This is my final project in the Logical Circuits course. In this project we designed a Smart Home Management System.
Language: Verilog - Size: 19.5 KB - Last synced at: over 2 years ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

amirhnajafiz-university/S3LC02
Logical circuits course final project.
Language: Verilog - Size: 281 KB - Last synced at: 9 days ago - Pushed at: over 2 years ago - Stars: 3 - Forks: 0

senavs/BitJoy
:heavy_check_mark: Bit, Bytes and Logical Gates Abstraction
Language: Python - Size: 31.3 KB - Last synced at: 4 days ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 0
