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GitHub topics: quartus2

RaeinLayeghPour/FPGA-Based-Simple-CPU-Design

FPGA-Based Simple CPU Design using VHDL

Language: VHDL - Size: 0 Bytes - Last synced at: 10 days ago - Pushed at: 10 days ago - Stars: 0 - Forks: 0

shawntsai0312/NTUEE_DIGITAL_CIRCUIT_LAB_24FALL

NTUEE Digital Circuit Lab 24Fall

Language: SystemVerilog - Size: 52.2 MB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 27 - Forks: 2

GitGminor/Quartus-Clock

A course assignment completed using Quartus software.

Language: Verilog - Size: 44.9 KB - Last synced at: 5 months ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0

jasonsu131/COE328-Design-of-a-Simple-General-Purpose-Processor

The designing of a simple general purpose processor using VHDL and Quartus II. Design consists of 2 latches, 4 seven segment displays, an arithmetic logic unit, a FSM, and a 4x16 decoder.

Size: 704 KB - Last synced at: about 1 month ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0

demianmozo/lab_fpga

Laboratorio 1: FPGA. Introducción en el empleo de programación digital en FPGA.

Language: VHDL - Size: 2.45 MB - Last synced at: 7 months ago - Pushed at: 7 months ago - Stars: 0 - Forks: 0

errray/fpga-spaceship

This space ship game project, where the spaceship is positioned at the center and objects coming from different directions can be hit using FPGA buttons, has been implemented with Verilog coding in quartus environment for Altera System-on-Chip (SoC) FPGA and VGA for display.

Language: Verilog - Size: 656 KB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0

jimfangx/DE2-70-Bringup

Assorted Verilog that brings up different elements (VGA, Ethernet, Switches, LED, LCD, etc.) of the terasIC DE2-70 Development Board.

Language: C - Size: 52.4 MB - Last synced at: 11 months ago - Pushed at: 11 months ago - Stars: 0 - Forks: 0

MoeeinAali/CE323-CA

Solutions to Dr. Arshadi's CE323: Computer Architecture Course (Sharif University of Technology - Spring 2024)

Language: TeX - Size: 99.1 MB - Last synced at: 2 months ago - Pushed at: 11 months ago - Stars: 0 - Forks: 0

tocache/Altera-Cyclone-II-FPGA

Repositorio de proyectos hechos en el Quartus II para el FPGA Cyclone II

Language: C - Size: 229 MB - Last synced at: 11 months ago - Pushed at: 11 months ago - Stars: 7 - Forks: 1

Charlie-Ramirez-Animation-Studios-de-MX/VHDL-Basicos

Programas Basicos en Lenguaje VHDL de Diseño Logico y Diseño de Circuitos Digitales para Uso y simulacion con QuartusII y los FPGA Cyclone III de Altera (Compilados y compatibles con la FPGA EP3C16F484C6N) Para Practica en la Licenciatura de Ingenieria Electrica Electronica e Ingenieria en Computación Bajo Licencia MIT

Language: VHDL - Size: 26.4 KB - Last synced at: 11 months ago - Pushed at: 11 months ago - Stars: 0 - Forks: 0

Everloom-129/ECE385-Digital-Systems-Lab

The goal of ECE 385 course is to teach students to design, build, and test/debug a digital system, which can be a 16-bit microprocessor, a dedicated logic core, or a system-on-a-chip (SoC) platform

Language: Verilog - Size: 113 MB - Last synced at: 9 months ago - Pushed at: 12 months ago - Stars: 1 - Forks: 0

Erfangholiz/My-VHDL

A dump for my VHDL projects, because I want to have a better understanding of Verilog and also Logic circuits.

Language: Verilog - Size: 383 KB - Last synced at: 12 months ago - Pushed at: 12 months ago - Stars: 0 - Forks: 0

jesusjimsa/Desarrollo-de-Hardware-Digital-UGR

Prácticas de la asignatura de Desarrollo de Hardware Digital en la UGR

Language: VHDL - Size: 41.1 MB - Last synced at: about 1 year ago - Pushed at: almost 6 years ago - Stars: 0 - Forks: 0

andrerocco/sistemas-digitais-multiplicadores

Diferentes multiplicadores implementados em hardware.

Language: VHDL - Size: 36.1 KB - Last synced at: about 1 year ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

zenek65/Quartus-HEX-16bit

convert avr 8bit intel HEX to Altera 16 bit HEX format

Language: Pascal - Size: 5.61 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

MohammadMahdi-Abdolhosseini/Computer-Architecture-Lab

Computer Architecture Lab - Assignments - Fall 2023

Language: SystemVerilog - Size: 3.86 MB - Last synced at: 2 months ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

AtlasFPGA/PINOUT_ATLAS_CYC1000

Subida del fichero TCL asociado al pineado de la placa CYC1000, Con sus múltiples variantes recogidas en un fichero de texto.

Size: 83 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

KonstantinosVasilopoulos/aueb_processor

A 16 bit processor, following the RISC architecture. Made with Quartus and VHDL.

Language: HTML - Size: 17.6 MB - Last synced at: over 1 year ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0

joonicks/BizzasCPU

Bizzas CPU design

Language: C - Size: 423 KB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 2 - Forks: 0

Chrisdeleon91/Altera-DE1-VGA-Interface

Integrated and programmed a VGA Interface using the Altera DE1 to output in synchronization with a custom programmed finite-state machine.

Language: VHDL - Size: 8.2 MB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

topofkeks/arilla

Arilla - a RISC-V based microcomputer system, with a PS2 mouse controller and 12-bit RGB SVGA graphics card, running Arilla Paint.

Language: VHDL - Size: 8.07 MB - Last synced at: over 1 year ago - Pushed at: over 3 years ago - Stars: 4 - Forks: 2

DavidRosero/FPGAWorldCodes

Ejemplos de codigo con implementación en hardware para la tarjeta Cyclone IV lenguaje VHDL

Language: VHDL - Size: 382 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 2

markods/FpgaTetris

Language: VHDL - Size: 17.6 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0

LoicKonan/Logic-Design

Logic Design.

Language: VHDL - Size: 3.05 MB - Last synced at: almost 2 years ago - Pushed at: about 3 years ago - Stars: 2 - Forks: 0

GoldOrange261/VHDL-Examples

This repository contains some VHDL code examples for solving various problems. VHDL is a hardware description language that can model the behavior and structure of digital systems. These code examples can help you learn and practice VHDL programming.

Language: VHDL - Size: 1.01 MB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

jrg94/EECS301 📦

CWRU's Logic Lab

Language: Verilog - Size: 32.2 KB - Last synced at: about 1 year ago - Pushed at: over 6 years ago - Stars: 1 - Forks: 0

LelePG/implementacoes_VHDL 📦

Implementações feitas em VHDL nas disciplinas de Circuitos Digitais I, Circuitos Digitais II e Sistemas Digitais Avançados

Language: HTML - Size: 23.4 MB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 0 - Forks: 0

pa-tiq/DE0_FIR_Filter

FIR filter for Altera DE0 EP3C16F484C6N Created on top of SURF VHDL FIR Filter

Language: VHDL - Size: 2.78 MB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 2 - Forks: 0

furkankayar/DEUARC

DEUARC RISC computer design in Quartus II 13.0

Language: VHDL - Size: 7.5 MB - Last synced at: 2 months ago - Pushed at: about 5 years ago - Stars: 2 - Forks: 1

daerong/VHDL_Study

Quartus II, MX6Q를 사용한 HDL 학습

Language: VHDL - Size: 21.9 MB - Last synced at: over 1 year ago - Pushed at: almost 7 years ago - Stars: 0 - Forks: 0

marcelovalois/projetoULA

Projeto de uma ULA feito em Quartus II para a disciplina de Sistemas Digitais (2019.1)

Language: HTML - Size: 2.05 MB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0

rusito-23/arki

Quartus II Pipelined Processor

Language: SystemVerilog - Size: 444 KB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 0

NeilNie/LC-3

Verilog Implementation of the LC-3 Processor. DA CS 603

Language: HTML - Size: 147 MB - Last synced at: about 2 years ago - Pushed at: about 6 years ago - Stars: 3 - Forks: 1

mdivjak/Icy_Tower

Icy Tower FPGA Cyclone III Game

Language: VHDL - Size: 4.84 MB - Last synced at: 5 months ago - Pushed at: over 6 years ago - Stars: 0 - Forks: 2

NeilNie/LearnVerilog_Lab1

Learning Verilog, Quartus & FPGA. DA CS 603

Language: Verilog - Size: 18.1 MB - Last synced at: about 2 years ago - Pushed at: over 6 years ago - Stars: 0 - Forks: 0