GitHub topics: de1-soc
JuanCantu1/DSP-System-for-Trumpet-Audio-Enhancement
Real-time trumpet audio enhancement system with note detection, frequency analysis, and live DSP effects implemented across the DE1-SoC’s ARM processor and Cyclone V FPGA.
Size: 31.3 KB - Last synced at: 6 days ago - Pushed at: 6 days ago - Stars: 2 - Forks: 0

mcleber/Bug_fixes_and_Configuration_Files
This repository gathers notes, fixes, and configurations related to bugs and issues encountered during the installation and usage of various software tools on both Linux and Windows platforms.
Size: 2.93 KB - Last synced at: 14 days ago - Pushed at: 14 days ago - Stars: 0 - Forks: 0

Choaib-ELMADI/risc-v-on-de1-soc-fpga
A simplified RISC-V processor implemented in Verilog and deployed on the DE-1 SoC FPGA board.
Language: Verilog - Size: 24.3 MB - Last synced at: 25 days ago - Pushed at: 25 days ago - Stars: 5 - Forks: 2

gilbertotumangday1/De1-SoC-fishing
Stardew Valley style fishing game on for ECE 243 final project by Rashaad Anwar and Gilberto Tumangday. Programmed in C and ran on an FPGA board with input from PS2 keyboard.
Language: C - Size: 0 Bytes - Last synced at: 28 days ago - Pushed at: 28 days ago - Stars: 0 - Forks: 0

NZHGREALISH/Soundmind
An absolute pitch testing game developed on DE1-SoC FPGA with multiple difficulty levels and practice mode
Language: C - Size: 79.1 MB - Last synced at: about 2 months ago - Pushed at: about 2 months ago - Stars: 2 - Forks: 0

electro-logic/CameraVision2
Connect a modern, high-resolution camera to an FPGA and easily develop your applications
Language: C - Size: 123 MB - Last synced at: 9 days ago - Pushed at: 10 months ago - Stars: 12 - Forks: 4

danielbboy111/CPEN-211
CPEN 211: Computing Systems I
Size: 0 Bytes - Last synced at: 3 months ago - Pushed at: 3 months ago - Stars: 0 - Forks: 0

naylane/candi-block
Jogo inspirado no clássico Tetris e Candy Crush. Utiliza o acelerômetro do DE1-SoC e um monitor CRT.
Language: C - Size: 23.2 MB - Last synced at: about 2 months ago - Pushed at: 7 months ago - Stars: 0 - Forks: 2

jszhn/ps2-interface
Hardware and software interfaces for the PS/2 keyboard/mouse protocol. Built for Terasic's DE1-SoC, DE10, and DE2 platforms.
Language: SystemVerilog - Size: 69.3 KB - Last synced at: 4 months ago - Pushed at: 4 months ago - Stars: 0 - Forks: 0

JVKran/Response-Time-Game
Response-Time Game written in VHDL. Supports cheat-prevention, pseudo-random delay, ws2812b response visualization and custom time-windows.
Language: VHDL - Size: 589 KB - Last synced at: 3 months ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 0

jasonhsu93/CPU-Classic-RISC-Pipeline-Machine
Made a fully functional CPU model capable of performing essential computing tasks, such as executing instructions from memory, handling data with load and store operations.
Language: SystemVerilog - Size: 48.8 KB - Last synced at: 5 months ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0

TarikBugraAy/Rock-Paper-Scissors-Game-ARMv7-DE1-SoC
This project implements a Rock-Paper-Scissors game on the ARMv7 DE1-SoC platform.
Language: Assembly - Size: 132 KB - Last synced at: 5 months ago - Pushed at: 5 months ago - Stars: 1 - Forks: 2

OP-Patel/Gomoku
Gomoku on a DE1-SoC Board
Language: Verilog - Size: 662 KB - Last synced at: 5 months ago - Pushed at: 5 months ago - Stars: 0 - Forks: 0

anderson-pereira/meta-de1-soc
OpenEmbedded/Yocto BSP layer for Altera DE1-SoC
Language: BitBake - Size: 228 KB - Last synced at: 2 months ago - Pushed at: almost 2 years ago - Stars: 1 - Forks: 0

errray/fpga-spaceship
This space ship game project, where the spaceship is positioned at the center and objects coming from different directions can be hit using FPGA buttons, has been implemented with Verilog coding in quartus environment for Altera System-on-Chip (SoC) FPGA and VGA for display.
Language: Verilog - Size: 656 KB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0

ASP-SoC/ASP-SoC.github.io
Audio Signal Processing SoC Project Website
Language: HTML - Size: 3.96 MB - Last synced at: 9 months ago - Pushed at: about 8 years ago - Stars: 6 - Forks: 1

ValmirNogFilho/FruitManiac
Jogo implementado para a matéria MI-Sistemas Digitais em Engenharia de Computação na UEFS. Feito no kit de desenvolvimento De1-SoC com módulo kernel, construído em um trabalho anterior, para um processador gráfico, e controlado por mouse.
Language: C - Size: 12.9 MB - Last synced at: 9 months ago - Pushed at: 10 months ago - Stars: 1 - Forks: 0

Jdgenius/ECE243-Project-2024
University of Toronto second-year electrical and computer engineering two-person group project for computer organization course.
Language: C - Size: 8.76 MB - Last synced at: 3 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0

Aabha-J/Verilog-Asteroid-Defense-Game
Utilized DE1-SoC Board & verilog code, to create a game where users shoot lasers to defend themselves from asteroids
Language: Verilog - Size: 25.4 KB - Last synced at: 11 months ago - Pushed at: 12 months ago - Stars: 1 - Forks: 0

SakaSerbia/GAME-SURFER-on-VHDL-DE1-SoC
VHDL Implementation of the Game Surfer on DE1-SoC Board
Size: 14.6 KB - Last synced at: 12 months ago - Pushed at: over 7 years ago - Stars: 0 - Forks: 0

ASP-SoC/ASP-SoC
Audio Signal Processing SoC
Language: VHDL - Size: 33.9 MB - Last synced at: 9 months ago - Pushed at: about 7 years ago - Stars: 17 - Forks: 8

Dipto9999/Scrolling_Display_DE1-SoC
Scrolling Display Implemented With Digital Design Concepts on De1-SoC
Language: SystemVerilog - Size: 3.09 MB - Last synced at: 10 days ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

BilalM04/combination-lock-FSM
Moore FSM combination lock in Verilog for DE1-SOC Board.
Language: Verilog - Size: 3.91 KB - Last synced at: 5 days ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

Sajeev-D/Graphify
Graphing Calculator on DE1-soc Board
Language: C - Size: 1.64 MB - Last synced at: about 1 year ago - Pushed at: about 1 year ago - Stars: 0 - Forks: 0

ljishen/altera-fpga-demos
Language: C++ - Size: 36 MB - Last synced at: about 1 year ago - Pushed at: almost 8 years ago - Stars: 0 - Forks: 0

abr/c5soc-ocl-id
OpenCL wrapper for Intel's unique chip ID function built for the Cyclone V chip on the DE1-SoC board
Language: C++ - Size: 354 KB - Last synced at: about 1 year ago - Pushed at: about 6 years ago - Stars: 1 - Forks: 0

yerminal/TicTacToe
This is an METU-EE314 Term Project named TicTacToe (game) implemented on DE1-SoC board.
Language: Tcl - Size: 283 MB - Last synced at: 5 months ago - Pushed at: almost 2 years ago - Stars: 1 - Forks: 0

yixinlok/pinball
C++ pinball game for a DE1-SoC Computer
Language: C - Size: 539 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 1

deepan19/Hardware-Accelerated-Video-Compression-using-DCT
Individual Contributions to my team's CPEN 391 final project. I developed the video frame capture system for the D8M, created Avalon slaves for hardware-software interfacing and the DCT hardware accelerator
Language: Verilog - Size: 951 KB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 1

johan92/yafpgatetris
Yet Another Tetris on FPGA Implementation
Language: Verilog - Size: 300 KB - Last synced at: about 1 year ago - Pushed at: about 4 years ago - Stars: 35 - Forks: 18

bruce311/CSGO-fpga-Edition
FPGA Verilog HDL design project (DE1-SoC)
Language: Verilog - Size: 39 MB - Last synced at: about 1 year ago - Pushed at: over 7 years ago - Stars: 10 - Forks: 2

Mert-Yazgan/guitar_hero
A basic Guitar Hero implementation, written in C, for ARM A9 HPS in DE1-SoC board
Language: C - Size: 20.8 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0

MuellerDominik/fpga-division
Division Algorithms in FPGAs
Language: VHDL - Size: 2.85 MB - Last synced at: 2 months ago - Pushed at: over 5 years ago - Stars: 8 - Forks: 1

Kenny2github/DE1-Stormbound-on-Chip
A rudimentary version of Stormbound implemented on the DE1-SoC.
Language: C - Size: 524 KB - Last synced at: about 2 months ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

norxander/meta-convnet
Recipes to generate many tools in order to get the Caffe library running on the DE1-SoC board
Language: C - Size: 26.4 KB - Last synced at: over 1 year ago - Pushed at: about 8 years ago - Stars: 0 - Forks: 1

thinkoco/c5soc_opencl
DE1SOC DE10-NANO DE10-Standard OpenCL hardware that support VGA and desktop. And Some applications such as usb camera YUYV to RGB , Sobel and so on.
Language: Verilog - Size: 30.5 MB - Last synced at: over 1 year ago - Pushed at: over 4 years ago - Stars: 84 - Forks: 39

aaqdas/bresenham-fpga
Verilog Implementation of Bresenham Circle Drawing Algorithm
Language: Verilog - Size: 26.4 KB - Last synced at: almost 2 years ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0

Louis-He/ECE243_Reversi
Final project for ECE243
Language: C - Size: 2.09 MB - Last synced at: almost 2 years ago - Pushed at: about 6 years ago - Stars: 4 - Forks: 0

ridvikpal/processor_extension
Working Code for ECE243 Lab 9 (Winter 2023) at the University of Toronto. Main code is written in Verilog.
Language: Python - Size: 750 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

ridvikpal/enhanced_processor
Working Code for ECE243 Lab 8 (Winter 2023) at the University of Toronto. Main code is written in Verilog.
Language: Verilog - Size: 599 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

ridvikpal/simple_processor
Working Code for ECE243 Lab 7 (Winter 2023) at the University of Toronto. Main code is written in Verilog.
Language: Python - Size: 795 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

LindyZh/JUMP
🔧 University of Toronto ECE243 Final Open software project.
Language: C - Size: 504 KB - Last synced at: over 1 year ago - Pushed at: almost 3 years ago - Stars: 5 - Forks: 0

AtaberkOKLU/SaleTerminal
FPGA Based Point of Sale Project using Verilog
Language: Verilog - Size: 493 MB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 1

ridvikpal/lines_on_de1_soc
Working code for ECE243 Lab 5 (Winter 2023). All code is written and debugged in ARM Assembly.
Language: C - Size: 13.7 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

ridvikpal/io_polling_timers
Working code for ECE243 Lab 3 (Winter 2023) at the University of Toronto. All code is written and debugged in ARM Assembly.
Language: Assembly - Size: 248 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

ridvikpal/longest_string_in_binary_number
Working code for ECE243 Lab 2 (Winter 2023) at the University of Toronto. All code is written and debugged in ARM Assembly.
Language: Assembly - Size: 146 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

ridvikpal/interrupts_in_assembly
Working Code for ECE243 Lab 4 (Winter 2023) at the University of Toronto. All code is written and debugged in ARM Assembly.
Language: Assembly - Size: 519 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

ridvikpal/binary_to_decimal
Working Code for ECE243 Lab 1 (Winter 2023). All code is written and debugged in ARM Assembly.
Language: Assembly - Size: 781 KB - Last synced at: about 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

jtgebert/fpganes_release
Reconstructing NES game console on Altera DE1-SOC FPGA using System Verilog
Language: HTML - Size: 20.5 MB - Last synced at: about 2 years ago - Pushed at: about 8 years ago - Stars: 33 - Forks: 14

ShreyansK2000/Translaite
A language learning solution to learn vocabulary from day-to-day objects with front-end on De1-SoC Cyclone V FPGA and backend on a Raspberry Pi, incorporating Microsoft Azure Cognitive Services
Language: HTML - Size: 8.31 MB - Last synced at: about 2 years ago - Pushed at: about 5 years ago - Stars: 2 - Forks: 1

FSq-Poplar/FPGA_NN
A neural network built in Verilog for the DE1-SoC FPGA board for handwritten digit recognition.
Language: Verilog - Size: 17.7 MB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 5 - Forks: 4

jessicarod7/ece243-oml-public
Description of a game based on One More Line, created as the final project for ECE243 (Computer Organization).
Size: 4.7 MB - Last synced at: about 13 hours ago - Pushed at: about 4 years ago - Stars: 1 - Forks: 0

ayshon/space-invaders-c
Space Invaders created using C for the De1-SoC board. Made in the winter 2020 semester for the ECE243 class.
Language: C - Size: 34.2 KB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 1

thinkoco/mi-lcd
A multiple interface (intel 8080, 3-wire SPI, DPI RGB ) 5 inch TFT LCD capacitive touch screen which is compatible with teraisc DE-series boards
Language: C - Size: 18 MB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 18 - Forks: 6

jagumiel/Tamagotchi-VHDL
Tamagotchi Implementation in VHDL
Language: VHDL - Size: 5.21 MB - Last synced at: almost 2 years ago - Pushed at: almost 3 years ago - Stars: 1 - Forks: 0

RomeoMe5/Hummingbird-FPGA-De1-SoC
FPGA Cripto Algorithm Hummingbird
Language: HTML - Size: 28.4 MB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 1 - Forks: 0

janus-tg/Roulette-DE1SoC
C program to play roulette on the Altera DE1SoC board.
Size: 150 KB - Last synced at: about 2 years ago - Pushed at: almost 4 years ago - Stars: 1 - Forks: 0

fontan10/spaceInvadersC
Space Invaders video game written in C for the DE1SoC board
Language: C - Size: 367 KB - Last synced at: about 2 years ago - Pushed at: about 5 years ago - Stars: 0 - Forks: 0

RomeoMe5/HopfieldFPGA
Implementation of Hopfield network using Verilog
Language: Verilog - Size: 1.26 MB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 2 - Forks: 0

asmasurti/Cannonhead-Clash
A multiplayer game coded in C that runs on CPUlator and uses the PS/2 keyboard for input.
Size: 646 KB - Last synced at: about 2 years ago - Pushed at: about 4 years ago - Stars: 0 - Forks: 0

TheBigSasha/Image_to_short_array-DE1-SOC
I wrote this to submit memes to my ECSE324 lab at McGill University.
Language: Java - Size: 460 KB - Last synced at: about 2 months ago - Pushed at: about 4 years ago - Stars: 0 - Forks: 0

yixin0829/ece241-fpga-final-project
FPGA project using DE1-SoC board that can process images into different filter effects
Language: Verilog - Size: 98.4 MB - Last synced at: about 2 months ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 1

priyyanshi/Grapher-VGA-Graphing-Calculator-
University of Toronto - Computer Organization (ECE243) Project
Language: C - Size: 255 KB - Last synced at: almost 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 0

davidweitzenfeld/verifrogger
🐸 Frogger-like arcade game written in Verilog for the Altera DE1 FPGA board
Language: Verilog - Size: 169 KB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 0

goodbye-and-hello/Audio_SoC
Making Audio Program using DE1-SoC
Language: C - Size: 773 KB - Last synced at: about 2 years ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 1

frankshc/guitar_amp_sim
Guitar amp sim for Altera DE1-SoC NIOS2
Language: Assembly - Size: 2.29 MB - Last synced at: about 2 years ago - Pushed at: about 7 years ago - Stars: 0 - Forks: 1

coolsday/TriviaGame
Trivia game programmed in Assembly using NIOS II instruction set - FINISHED BETA TESTING - VERSION 1.00 RELEASED!
Language: Assembly - Size: 80.5 MB - Last synced at: over 2 years ago - Pushed at: about 8 years ago - Stars: 0 - Forks: 0
