Ecosyste.ms: Repos

An open API service providing repository metadata for many open source software ecosystems.

GitHub topics: half-adder

ichko/nand-to-tetris

This repository contains HWs and material from the nand to tetris course

Language: Assembly - Size: 873 KB - Last synced: about 2 months ago - Pushed: over 6 years ago - Stars: 1 - Forks: 1

krish1925/Logic-Design-Verilog

Labwork on Logic Design implementation in Verilog on a Basys3 FPGA Module

Language: Tcl - Size: 8.53 MB - Last synced: about 2 months ago - Pushed: about 2 months ago - Stars: 0 - Forks: 0

ginf-ch/digitaltechnik-skript

Skript zur EinfΓΌhrung in die Digitaltechnik

Language: TeX - Size: 12.7 MB - Last synced: 6 months ago - Pushed: 6 months ago - Stars: 0 - Forks: 0

joeymaillette04/VHDL

VHDL implementations of half-adders, full-adders, and a 4-bit adder for digital circuit design

Language: VHDL - Size: 4.88 KB - Last synced: 8 months ago - Pushed: 8 months ago - Stars: 0 - Forks: 0

nxbyte/Verilog-Projects

This repository contains source code for past labs and projects involving FPGA and Verilog based designs

Language: Verilog - Size: 2.23 MB - Last synced: 7 months ago - Pushed: over 4 years ago - Stars: 91 - Forks: 21

aliansgp/VHDL_Adders

Different adders code in VHDL and Comparison

Language: C - Size: 1.3 MB - Last synced: 8 months ago - Pushed: over 1 year ago - Stars: 1 - Forks: 0

bespoyasov/binary-full-adder-in-the-game-of-life

Binary adder implementation in the Game of Life written in JavaScript using canvas.

Language: JavaScript - Size: 199 KB - Last synced: 2 months ago - Pushed: about 2 years ago - Stars: 5 - Forks: 1

imvickykumar999/Logical-Redstone-Reloaded

Download my Redstone World: https://www.planetminecraft.com/project/redstone-circuits-6024948/

Language: Python - Size: 128 MB - Last synced: 4 months ago - Pushed: 10 months ago - Stars: 1 - Forks: 1

Stavros/Multiplier4bit

A 4bit Multiplier in VHDL

Language: VHDL - Size: 2.94 MB - Last synced: 10 months ago - Pushed: over 4 years ago - Stars: 2 - Forks: 1

newajsharif91/Verilog_HDL_Digital-System-Design

CSE-2112 Digital Syatem Design LAb

Language: Verilog - Size: 6.84 KB - Last synced: 11 months ago - Pushed: over 1 year ago - Stars: 0 - Forks: 0

shanestaret/TwosComplementer

A simple program that converts a binary number into it's two's complement equivalent. This is used within the SimpleBinaryCalculator repository.

Language: Java - Size: 8.79 KB - Last synced: 11 months ago - Pushed: over 6 years ago - Stars: 1 - Forks: 1

DatDarkAlpaca/dat-emulation-sandbox

A simulation where I can connect virtual logic gates and build virtual CIs.

Language: C++ - Size: 60.5 KB - Last synced: about 1 year ago - Pushed: over 1 year ago - Stars: 2 - Forks: 0

Zannatul-Naim/Digital-System-Design

Digital System Design Lab Codes using Verilog

Language: Verilog - Size: 52.7 KB - Last synced: about 1 year ago - Pushed: over 1 year ago - Stars: 2 - Forks: 0

scriptographers/CS254-Assignment-3

Assignment 3, Digital Logic Design Lab, Spring 2021, IIT Bombay

Language: VHDL - Size: 1.03 MB - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0

jgesc/VerilogTests

A repository for some modules I made while learning Verilog

Language: Verilog - Size: 10.7 KB - Last synced: about 1 year ago - Pushed: about 3 years ago - Stars: 1 - Forks: 0

rahul21316/verilog-adders

All the various adders in Verilog!

Size: 22.5 KB - Last synced: over 1 year ago - Pushed: about 3 years ago - Stars: 1 - Forks: 0

Grv-Singh/Digital-Systems-Design

Playing with ⚑ logic gates to make corresponding βœ” decision making circuits solving πŸ”Œ electronic challenges at hand 🚦

Language: MATLAB - Size: 3.24 MB - Last synced: 12 months ago - Pushed: over 3 years ago - Stars: 0 - Forks: 0

senavs/BitJoy

:heavy_check_mark: Bit, Bytes and Logical Gates Abstraction

Language: Python - Size: 31.3 KB - Last synced: 21 days ago - Pushed: over 4 years ago - Stars: 0 - Forks: 0

shanestaret/SimpleBinaryCalculator

A simple binary calculator based on a system of gates

Language: Java - Size: 24.4 KB - Last synced: 11 months ago - Pushed: over 6 years ago - Stars: 2 - Forks: 1

daedalus/bitlogicemu

bitwise operation examples

Language: Python - Size: 17.6 KB - Last synced: about 1 year ago - Pushed: almost 8 years ago - Stars: 0 - Forks: 1