GitHub topics: flipflop
Bharadwaj-R/Basic-Verilog-Codes
Compiled set of verilog codes for beginners. Can help you with getting started with basics of verilog.
Language: Verilog - Size: 21.5 KB - Last synced at: 28 days ago - Pushed at: 28 days ago - Stars: 0 - Forks: 0
Zannatul-Naim/Digital-System-Design
Digital System Design Lab Codes using Verilog
Language: Verilog - Size: 52.7 KB - Last synced at: 2 months ago - Pushed at: over 2 years ago - Stars: 3 - Forks: 0
YajanaRao/Verilog
Verilog Programs
Language: Verilog - Size: 133 KB - Last synced at: 6 days ago - Pushed at: about 4 years ago - Stars: 2 - Forks: 0
piyalidas10/Quiz-Flip-Flop-Angular
Quiz game with Flip Flop animation in Angular 12
Language: TypeScript - Size: 10.9 MB - Last synced at: 24 days ago - Pushed at: about 2 years ago - Stars: 12 - Forks: 2
Gnuhry/MLG
MeinKraft-Logik-Gatter
Language: Java - Size: 2.47 MB - Last synced at: about 1 year ago - Pushed at: almost 5 years ago - Stars: 2 - Forks: 1
Mvrtn-design/TC-Dise-o_VHDL_de_sistemas_secuenciales
Diseño de un circuito secuencial con entrada de datos x de 1 bit, una entrada de reset y una entrada de reloj. El sistema es un detector de secuencia que genera una salida z de 1 bit con ‘1’ cuando los últimos cuatro bits recibidos en x son 0101. El circuito se diseña de diversas maneras, cada una de ellas con una descripción en VHDL
Language: VHDL - Size: 5.86 KB - Last synced at: over 1 year ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0
DevMajed/Digital-Logic_and-Design 📦
Digital Logic Design using pen and paper to design with Analog discovery 2, and using Verilog for synthesizing. these are some of my junior year labs for Digital Electronics
Language: Verilog - Size: 31.3 KB - Last synced at: over 1 year ago - Pushed at: almost 5 years ago - Stars: 2 - Forks: 0
abottegam/Digital-Stopwatch
Real time digital stopwatch design and FPGA implementation.
Language: Verilog - Size: 1.2 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
Shakil-RU/Verilog_HDL
"Verilog_HDL" repository contains hardware description language (HDL) code written in Verilog for various digital logic and electronic designs."
Language: Verilog - Size: 87.9 KB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 0 - Forks: 0
Myriam2002/Digital_lock_for_a_safe
Basic digital lock system for safes, employing logic gates 🔐
Size: 1.72 MB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0
syedirfanx/digital-logic-design
CSE231 - Digital Logic Design.
Size: 4.88 KB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 1 - Forks: 0
FarshidKeivanian/Optimization-of-JK-Flip-Flop-Layout-with-Minimal-Average-Power-of-Consumption-based-on-ACOR-Fuzzy-A
FuzzyACOR-Algorithm (Adaptive fuzzy metaheuristic based optimisation algorithm)
Language: MATLAB - Size: 1.06 MB - Last synced at: about 1 year ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 1
Ishikashah2510/Tic-Tac-Toe-Logisim-
Tic tac toe implementation using logisim
Size: 9.77 KB - Last synced at: about 2 years ago - Pushed at: over 4 years ago - Stars: 0 - Forks: 2
piyalidas10/Quiz-flipflop-with-One-Question
Quiz flipflop with One Question at a time and next, previous links in Angular 8
Language: TypeScript - Size: 3.06 MB - Last synced at: about 2 months ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0
osho-agyeya/FASTEST-FINGER-FIRST
Fastest Finger First
Size: 90.1 MB - Last synced at: about 2 years ago - Pushed at: over 5 years ago - Stars: 0 - Forks: 1
Frankline-Sable/Asynchronous-Down-Counter-With-74LS112-
⏱ A counter whereby each flipflop output drives the CLOCK input of the next flipflop. It is asynchronous in that the flipflops do not change states in exact synchronism with the applied clock pulses. Its counts are descending
Size: 298 KB - Last synced at: about 2 years ago - Pushed at: about 6 years ago - Stars: 0 - Forks: 0
