DigitalLabIIESTS/DigitalDesignUsingVerilogHDL

A Verilog HDL Guide for Beginners.

Language: Verilog - Size: 49.9 MB - Last synced at: 7 months ago - Pushed at: 7 months ago - Stars: 2 - Forks: 1

gubbriaco/digital-electronics-projects

Progetti di Elettronica Digitale 2021.

Language: VHDL - Size: 7.01 MB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0

OfficialPixelBrush/PASS-2-4

A Diode-Transistor-Logic Adder System built from Scratch, with simplicity and robustness in mind

Size: 1.4 MB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 1 - Forks: 0

Sandy71004/Adders-Analysis-Using-Xilinx-Vivado

In this project, I conducted an in-depth comparative analysis of various adder architectures to assess their performance in terms of delay and power consumption.

Size: 85 KB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0

RichaSavant/Icarus-Verilog-HDL-Logical-Circuits-2023

This repository focuses on designing and simulating logical circuits using Verilog HDL (Hardware Description Language) with the Icarus Verilog simulator.

Language: Verilog - Size: 76.2 KB - Last synced at: about 2 months ago - Pushed at: 10 months ago - Stars: 0 - Forks: 0

wasifijaz/Digital-System-Design-Verilog-Implementation

Digital System Design Verilog Implementation

Language: Verilog - Size: 48.8 KB - Last synced at: over 1 year ago - Pushed at: about 3 years ago - Stars: 1 - Forks: 0

Saadia-Hassan/8x8Multiplier-Using-Vedic-Mathematics

An 8-bit multiplier is synthesized and simulated in Xilinx ISE using Verilog HDL. The multiplication is performed using Vedic Mathematics which is proved to consume less power and faster than conventional multipliers.

Language: Verilog - Size: 4.88 KB - Last synced at: over 1 year ago - Pushed at: almost 5 years ago - Stars: 5 - Forks: 2

aliansgp/VHDL_Adders

Different adders code in VHDL and Comparison

Language: C - Size: 1.3 MB - Last synced at: over 1 year ago - Pushed at: about 2 years ago - Stars: 1 - Forks: 0

lironmiz/nand2tetrisCourse

acadamic course in campus il about building a modern computer from basic logic gates such as "nand" to a general computer architecture that is designed execute any program such as "Tetris". and also building assambler

Language: Scilab - Size: 101 KB - Last synced at: 3 days ago - Pushed at: about 2 years ago - Stars: 2 - Forks: 0

IaKee/INF01058-Digital-Circuits-Projects

Repository containing digital circuit projects developed for the INF01058 course at UFRGS.

Size: 8.06 MB - Last synced at: almost 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0

Ahmed-ata112/Adders-Mania

Language: Verilog - Size: 128 MB - Last synced at: almost 2 years ago - Pushed at: about 2 years ago - Stars: 1 - Forks: 2

Ashleshk/labView-Basics-to-Master

This repository contains project done in LabView IDE from Basic Gates designing, Adders, Counters, Encoders, Decoders and Examples to connect to external Arduino like embedded systems

Language: C++ - Size: 5.55 MB - Last synced at: about 2 years ago - Pushed at: almost 5 years ago - Stars: 2 - Forks: 0

jamestiotio/DigiAlpha

Optimized 32-Bit Full Adder, CEC-SAT Verifier & 2-SAT Solver

Language: C++ - Size: 6.96 MB - Last synced at: 12 months ago - Pushed at: over 1 year ago - Stars: 1 - Forks: 0

Mostafa-wael/Carry-Select-Adder

A digital design for a carry select adder

Language: Verilog - Size: 15.6 KB - Last synced at: about 1 month ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 0