Ecosyste.ms: Repos

An open API service providing repository metadata for many open source software ecosystems.

GitHub topics: subtractor

wasifijaz/Digital-System-Design-Verilog-Implementation

Digital System Design Verilog Implementation

Language: Verilog - Size: 48.8 KB - Last synced: 4 months ago - Pushed: about 2 years ago - Stars: 1 - Forks: 0

gabrielganzer/VHDL-DesignSynthesis

Design & Synthesis of several digital circuits in VHDL and Verilog. Scripting in TCL, simulation with Intel® ModelSim®, and synthesis under Synopsys® DC Ultra™.

Language: Verilog - Size: 7.4 MB - Last synced: 9 months ago - Pushed: over 3 years ago - Stars: 4 - Forks: 0

hosseinfani/digital_odyssey

Materials for the Computer Science course, Digital Design (Logic Circuits)

Language: C++ - Size: 393 MB - Last synced: 10 months ago - Pushed: about 2 years ago - Stars: 3 - Forks: 4

adityagupta1089/EEP206-Verilog

Verilog Codes for various digital circuits for labs at IIT Ropar, basic gates, adders & subtractors (half & full), ripple adders, multipliers and code converters.

Language: Verilog - Size: 18.6 KB - Last synced: 10 months ago - Pushed: about 7 years ago - Stars: 3 - Forks: 2

tirtharajsinha/vhdl_codes

vhdl

Language: VHDL - Size: 9.77 KB - Last synced: about 1 year ago - Pushed: over 3 years ago - Stars: 3 - Forks: 0

scriptographers/CS254-Assignment-5

Assignment 5, Digital Logic Design Lab, Spring 2021, IIT Bombay

Language: VHDL - Size: 709 KB - Last synced: about 1 year ago - Pushed: about 3 years ago - Stars: 0 - Forks: 0

Frankline-Sable/4-Bit-Binary-Adder-and-Subtractor-Wire-Connections

➕➖ Arithmetic operations in most machines are performed in the ALU whereby logic gates and flipflops are combined so that they can subtract, multiply, and divide binary numbers. This circuit only implements the addition part and subtraction on four bit digits

Size: 373 KB - Last synced: about 1 year ago - Pushed: over 5 years ago - Stars: 0 - Forks: 0

jacobshirley/circuits

As part of a Computer Systems Architecture module, I had to design a 2s complement generator, adder, subtractor, multiplier, and divider circuit.

Size: 1.53 MB - Last synced: 7 months ago - Pushed: about 6 years ago - Stars: 0 - Forks: 0