GitHub topics: sequential-circuits
Vaibhav-Gunthe/Verilog-Projects
A collection of Verilog-based digital design projects, from basic gates to complex modules like ALUs, FSMs, and memory units. Ideal for learning RTL design and synthesis.
Language: Verilog - Size: 1020 KB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 2 - Forks: 0
danielbboy111/CPEN-311
CPEN 311: Digital Systems Design
Size: 9.77 KB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 0 - Forks: 0
Mehedi-86/My_Digital_Clock_in_Logisim
This project showcases the design and simulation of a Digital Clock in Logisim Evolution, using counters, multiplexers, and clock signals to teach binary time-keeping and digital logic.🚀
Size: 1.58 MB - Last synced at: about 1 month ago - Pushed at: about 1 month ago - Stars: 0 - Forks: 0
onurdikilitas/4-bit-Sequence-Tracker
This project implement a synchronous sequential circuit which detects two different 4-bit sequences, A and B.
Language: C - Size: 875 KB - Last synced at: 3 months ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
gmostofabd/Digital-Logic-Circuits-and-Designs
🚀 This collection contains experiments focusing on the basics of digital logic gates using common ICs, equivalent circuits, and practical implementation using a breadboard. Investigates the functional truth tables of gates and simplification procedures using Boolean math's , Karnaugh mapping, de-Morgan's law etc.
Language: HTML - Size: 10.7 MB - Last synced at: about 1 month ago - Pushed at: 7 months ago - Stars: 0 - Forks: 0
RichaSavant/Icarus-Verilog-HDL-Logical-Circuits-2023
This repository focuses on designing and simulating logical circuits using Verilog HDL (Hardware Description Language) with the Icarus Verilog simulator.
Language: Verilog - Size: 76.2 KB - Last synced at: about 2 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0
punyansh-v/8-bit-encryptor-decryptor
Digital Electronics Project
Size: 16.1 MB - Last synced at: 9 months ago - Pushed at: 9 months ago - Stars: 0 - Forks: 0
Ishrak30/Number-Caller
A number caller for a specific sequence of numbers which are given in the requirements folder. All type of circuit design is done in the circ files. CSE231 project for North South University students.
Size: 577 KB - Last synced at: 12 months ago - Pushed at: almost 5 years ago - Stars: 0 - Forks: 0
0xMartin/LogicSimulator
Java-based application for simulating sequential and logic circuits of high complexity.
Language: Java - Size: 17.5 MB - Last synced at: 9 months ago - Pushed at: almost 2 years ago - Stars: 1 - Forks: 0
NTU-LaDS-II/FAN_ATPG
FAN (fan-out-oriented) ATPG (Automatic Test Pattern Generation) and Fault Simulation command line tool
Language: Verilog - Size: 10.7 MB - Last synced at: over 1 year ago - Pushed at: over 1 year ago - Stars: 51 - Forks: 11
Saadia-Hassan/Traffic-Light-Controller-Using-FSM
An automatic traffic light controller is designed and simulated using the concept of Finite State Machine in ModelSim.
Language: Verilog - Size: 2.93 KB - Last synced at: over 1 year ago - Pushed at: over 4 years ago - Stars: 1 - Forks: 0
rohankalbag/digital-design
Digital Design Lab - Autumn Semester 2021 - Indian Institute of Technology Bombay
Language: VHDL - Size: 17.4 MB - Last synced at: about 2 months ago - Pushed at: over 2 years ago - Stars: 1 - Forks: 0
AhmedAbdelaal2001/Advanced-Encryption-Standard
A full hardware implementation of the AES using Verilog, supporting SPI communication between all modules.
Language: Verilog - Size: 22.5 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0
IaKee/INF01058-Digital-Systems
This repository contains my assignments and projects for the Digital Systems course. The course covers the fundamental concepts of digital systems, including Boolean algebra, logic gates, combinational and sequential circuits, memory, and programmable logic devices. I have included VHDL code and simulation results for some of the projects.
Language: C - Size: 9.6 MB - Last synced at: almost 2 years ago - Pushed at: about 2 years ago - Stars: 0 - Forks: 0
MostafaSaftawy/Nand2Tetris
This is a projects have been completed through 2 parts of nand2tetris course on coursera.
Language: Hack - Size: 165 KB - Last synced at: almost 2 years ago - Pushed at: over 3 years ago - Stars: 1 - Forks: 0
memgonzales/hdl-flip-flop
Compilation of Verilog behavioral models and test benches for the four types of flip-flops (SR, JK, D, and T)
Language: Verilog - Size: 102 KB - Last synced at: about 1 month ago - Pushed at: over 2 years ago - Stars: 0 - Forks: 0
ShubhamGupta577/HDLbits_solutions
This repository contains the solutions of the problems given on HDLbits site.
Language: Verilog - Size: 69.3 KB - Last synced at: almost 2 years ago - Pushed at: almost 2 years ago - Stars: 0 - Forks: 0
hebaashraf21/Execution-Unit
An execution unit that is able to do the following commands: Move Value to Register, Move Register to Register, Add Value to Register, Add Register to Register, AND Value to Register and AND Register to Register.
Size: 48.8 KB - Last synced at: about 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 1
CodeWithAbbas/FPGA-Designing
It contains the VHDL coding of basic combinational and sequential circuits as well as top level design including Datapath and Controller
Size: 37.1 KB - Last synced at: almost 2 years ago - Pushed at: almost 3 years ago - Stars: 0 - Forks: 0
dimkatsi91/VHDL_Lab
VHDL Lab Exercises from simple Combinational/Sequential circuits to a simple CPU design
Language: VHDL - Size: 10 MB - Last synced at: almost 2 years ago - Pushed at: over 7 years ago - Stars: 1 - Forks: 0
